DocumentCode
996144
Title
Dielectric isolation by orientation-dependent etching
Author
Nicholas, K.H. ; Stemp, I.J. ; Brockman, H.E.
Author_Institution
Philips Research Laboratories, Redhill, UK
Volume
20
Issue
24
fYear
1984
Firstpage
1014
Lastpage
1015
Abstract
A dielectric isolation technology is described that is suitable for use in integrated circuits and particularly for latch-up suppression in CMOS. The silicon islands maintain the original crystal surface and no damaging implants are involved. The technique uses anisotropic and orientation-dependent etching followed by planarisation.
Keywords
CMOS integrated circuits; etching; integrated circuit technology; CMOS; Si islands; dielectric isolation technology; latch-up suppression; orientation-dependent etching; planarisation;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19840690
Filename
4249204
Link To Document