Title :
Min-net winner-take-all CMOS implementation
Author :
He, Yuhong ; Sanchez-Sinencio, Edgar
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
fDate :
7/8/1993 12:00:00 AM
Abstract :
A charge-based winner-take-all (WTA) circuit is proposed. This WTA circuit is a min-net capable of selecting the minimum value among its input nodes and gives only one low voltage for the corresponding output node. The charge-based circuit uses a power supply of 3 V, with low power dissipation due to the lack of static DC current involved. The WTA circuit is used in associative neural networks.
Keywords :
CMOS integrated circuits; neural chips; 3 V; WTA circuit; associative neural networks; charge-based winner-take-all circuit; input nodes; min-net; minimum value; output node; power dissipation; power supply; static DC current;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19930827
