A major-minor loop memory organization with invisible faulty loop correction

A novel method is presented for correction of faulty loops in redundant major-minor loop magnetic bubble memories using encoded variable delays implemented with a bubble logic gate. Delays implemented in the basis of Fibonacci numbers allow redundancy in the faulty loop corrector itself. Bubble logic correction of faulty loops is found to reduce the controller complexity by two-thirds with negligible impact on performance and at the cost of less than two percent area overhead.