DocumentCode
997763
Title
Built-In Self-Test Techniques
Author
McCluskey, Edward J.
Author_Institution
Stanford University
Volume
2
Issue
2
fYear
1985
fDate
4/1/1985 12:00:00 AM
Firstpage
21
Lastpage
28
Abstract
A system that includes self-test features must have facilities for generating test patterns and analyzing the resultant circuit response. This article surveys the structures that are used to implement these self-test functions. The various techniques used to convert the system bistables into test scan paths are discussed. The addition of bistables associated with the I/O bonding pads so that the pads can be accessed via a scan path (external or boundary scan path) is described. Most designs use linear-feedback shift registers for both test pattern generation and response analysis. The various linear-feedback shift register designs for pseudorandom or pseudoexhaustive input test pattern generation and for output response signature analysis are presented.
Keywords
Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Costs; Electrical fault detection; Fault detection; Sequential analysis; System testing; Test pattern generators;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.1985.294856
Filename
4069538
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