Title :
High-speed regenerator section terminating LSIs
Author :
Yamabayashi, Y. ; Sato, Yuuki ; Matsuoka, Shingo ; Hohkawa, Kohji
Author_Institution :
NTT Transmission Syst. Labs., Yokosuka, Japan
Abstract :
The authors report the first four-chip set for the STM-64 regenerator-section terminator, a key component of the next generation SDH transmission system. The Si-bipolar gate-array LSIs are fabricated and tested to confirm operation at 1.244 Gbit/s. This result makes it feasible to construct the line terminators needed.
Keywords :
application specific integrated circuits; bipolar integrated circuits; data communication equipment; digital communication systems; digital integrated circuits; large scale integration; optical communication equipment; repeaters; synchronous digital hierarchy; 1.244 Gbit/s; SDH transmission system; STM-64 regenerator-section terminator; Si; bipolar gate-array LSI; four-chip set; high-speed regenerator section; line terminators; terminating LSIs;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19931374
