• Record number
    18
  • Author

    Sutherland Stuart

  • Creator Role
    نويسنده
  • Title

    System Verilog for design: a guide to using System Verilog for hardware design and modeling

  • Publication
    Berline Springer
  • Published Year
    2006
  • Edition
    2
  • Fierst Pages
    xxx
  • Main Pages
    418
  • Collation
    xxx، 418، illus، tables، map/maps
  • Notes
    Index
  • Reprint
    False
  • Print issue
    0
  • Added entries
    AU نويسنده همكار Davidmann Simon , AU نويسنده همكار Flake Peter , AU مقدمه نويس Moorby Phil
  • Subject

    Verilog (Computer hardware description language) , Electronic digital computers- Design and construction , Computer simulation

  • Class
    005
  • Number
    13
  • CutterNumber
    S 7
  • ISBN
    0-387-33399-1شابك
  • Language
    انگليسي
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=7&DC=18