پياده‌سازي مميز ثابت فيلتر كالمن بر روي FPGA براي تخمين فاصله و سرعت اهداف متحرك

Fixed-point FPGA Implementation of a Kalman Filter for Range and Velocity Estimation of Moving Targets

در سامانه‌هاي رديابي هدف، از فيلتر رديابي براي تخمين پياپي و هموار موقعيت و سرعت هدف متحرك با كمينه خطا استفاده مي‌­شود. در اين مقاله، روشي براي طراحي و پياده‌­سازي سخت‌افزاري فيلتر كالمن در چنين كاربردي ارائه ‌شده است. روش پيشنهادي شامل يك پياده‌سازي مميز ثابت فيلتر روي FPGA است كه در آن سرعت اجراي الگوريتم از طريق موازي­‌سازي عمليات­ غير وابسته بهبود يافته است. پس از طراحي بر اساس مسأله داده‌­شده، نسخه­‌هاي مميز شناور و مميز ثابت فيلتر شبيه­‌سازي و نسخه مميز ثابت روي سخت­افزار پياده‌­سازي شده است. براي ارزيابي كارايي فيلتر، داده­‌هاي فاصله‌-سرعت يك هدف متحرك با مدل مناسب توليد و پس از چندي‌سازي و درآميختن با اغتشاش به فيلتر اعمال مي‌­شوند. نتايج نشان مي­‌دهد كه با انتخاب طول بيت مناسب، فيلتر پياده‌سازي‌‌شده سريع و كارآمد بوده و با زمان اجراي حدود µs 0/4، موجب dB 11 كاهش در خطاي تخمين فاصله شده و عملكردي نزديك به نمونه مميز شناور فراهم مي‌­آورد.

Tracking filters are extensively used within object tracking systems in order to provide consecutive smooth estimations of position and velocity of the object with minimum error. Namely, Kalman filter and its numerous variants are widely known as simple yet effective linear tracking filters in many diverse applications. In this paper, an effective method is proposed for designing and implementation of a Kalman filter in an object tracking application. The considered tracking application implies the capability to produce a smooth and reliable output stream by the tracking filter, even in presence of different disturbing types of noise, including background or spontaneous noises, as well as disturbances with continues or discrete nature. The presented method includes a fixed-point implementation of the Kalman filter on FPGA, which targets the joint estimation of position-velocity pair of an intended object in heavy presence of noise. The execution speed of the Kalman algorithm is drastically enhanced in the proposed implementation. This enhancement is attained by emphasis on hardware implementation of every single computational block on the one hand, and through appropriate parallelization and pipelining of independent tasks within the Kalman process on the other hand. After designing the filter parameters with respect to the requirements of a given tracking problem, a floating-point model and a fixed-point hardware model of the filter are implemented using MATLAB and Xilinx System Generator, respectively. In order to evaluate the performance of the filter under realistic circumstances, a set of appropriately defined scenarios are carried out. The simulations are carefully designed in order to represent the extremely harsh scenarios in which the input measurements to the filter are deeply polluted by different kinds of noises. In each simulation the position-velocity data corresponding to a moving object is generated according to an appropriate model, quantized, and contaminated by noise and fed into the filter. Performances of the Kalman filter in software version (i.e. the floating point replica) and hardware version (i.e. the fixed-point replica) are quantitatively compared in the designed scenario. Our comparison employs NMSE and maximum error values as quantitative measures, verifying the competency of our proposed fixed-point hardware implementation. The results of our work show that, with adequate selection word length, the implemented filter is fast and efficient; it confines the algorithm execution time to 50 clock pulses, i.e. about 0.4 µs when a 125 MHz clock is used. It is also verified that our implementation reduces the position and velocity estimation errors by 11 dB and 1.2 dB, respectively. The implemented filter also confines the absolute values of maximum error in position and velocity to 10 meter and 0.7 meter/sec. in the considered scenario, which is almost resembles the performance of its floating point counterpart. The presented Kalman filter is finally implemented on Zc706 evaluation board and the amount of utilized hardware resource (FFs, LUTs, DSP48, etc.) are reported as well as the estimated power consumption of the implemented design. The paper is concluded through comparison of the proposed design with some recent works which confirms the efficacy of the presented implementation.