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Institutional listings (Continued)
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Institutional Listings, 1974 IEEE S-MTT International Microwave Symposium
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Institutional metrics for the United States Marine Corps
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Institutional options and operational issues in technology assessment: Lessons from experiences in the United States and Europe
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Institutional Ownership and Capital Structure --Evidence from China Listed Companies
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Institutional ownership and earnings announcement timing of manager
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Institutional perspectives on entrepreneurial behavior in challenging environments
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Institutional quality and changing organization of international production networks
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Institutional relations of small autoparts firms in Brazil
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Institutional Repositories: Accessibility to academic research - public property
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Institutional Research in a University Without Regular Institutional Management: The Case of Japanese National Universities
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Institutional resources for inclusion of students with disabilities in the process of higher education
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Institutional Stock Trading and Loan Renegotiation Information
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Institutional Strategies For Sustainable Development: Case Studies Of Four Asian Industrializing Countries
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Institutional strategy for effective blended e-learning: HCI perspective of sustainable embedding
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Institutional support and corporate sponsors
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Institutional support for e-learning implementation in higher education practice: A case report of University of Rijeka, Croatia
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Institutional theory: a new perspective for research into IS/IT security in organisations
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Institutional tools for change
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Institutional transformation at a large private technical university: Reporting on the accomplishments of a combined data driven top-down and bottom-up approach
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Institutional, economic and technical dimensions of choosing private tertiary education in Bangladesh: Lessons for Australian Universities
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Institutionalisation of technology in contemporary business organizations
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Institutionalised Consensus in Vehicular Networks: Executable Specification and Empirical Validation
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Institutionalising change: application of CMM as a model for organisational change at ericsson
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Institutionalising open multi-agent systems
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Institutionalization in organizational form of social entrepreneurship: Cases from China and Bangladesh
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Institutionalization of a General Electronic Democracy through Electronic Democratic Parties - A General Concept with Focus on Germany
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Institutionalization of a restructured and refocused lower division undergraduate engineering education program
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Institutionalization of Development and Construction of Internet Education Resource in Colleges and Universities
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Institutionalization of E4
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Institutionalization of mechatronics engineering curricular material
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Institutionalization, Embedded Rationality, and the Escalation of Commitment to IT Projects
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Institutionalized: Organizational obstacles to communicating sustainability
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Institutionalizing a new curriculum for engineering majors at Polytechnic University
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Institutionalizing curriculum change: a SUCCEED case history
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Institutionalizing innovation management: A case study from the utility industry
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Institutionalizing large scale change
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Institutionalizing reliability and maintainability in the industrial/commercial organization
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Institutionalizing the assessment of engineering entrepreneurship
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Institutionalizing Web based education: a case study
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Institutions
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Institutions & Origanizations
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Institutions active in SOI development
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Institutions and Commitments for Agent-Based Supply Chain Management
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Institutions and commitments in open multi-agent systems
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Institutions and low carbon transport: The case of a decentralizing Indonesia
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Institutions and Orgnizations
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Institutions are fragmented
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Institutions for a sustainable civilization: negotiating change in a technological culture
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Institutions news
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Institutions recommend all-British MTTA
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Institutions should crop ´quasi-academic´ role and throw open membership
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Institutions, Innovation, and Incentives
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Institution-wide reform of undergraduate education in science, mathematics, engineering and technology
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Institutonal listings
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In-stream Validation of Measurements with OGC SWE Web Services
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In-stride battlespace characterization
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Instrinsic low-field loss in microwave ferrites
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Instrogram: A New Musical Instrument Recognition Technique Without Using Onset Detection NOR F0 Estimation
646
Instructing cooperating assembly robots through situated dialogues in natural language
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Instructing Industrial Controls Using Ladder Diagrams on an IBM PC
648
Instructing non-majors programming: Knowledge organization by illustration
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Instructing the Innovation of Control Strategies by TRIZ
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Instruction and assessment of information literacy among STEM majors
651
Instruction and data cache peak temperature reduction using cache access balancing in embedded processors
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Instruction and Data NAND Flash Memory System for Embedded Systems
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Instruction and Evaluation of University Physics Experiment under the Theory of Multiple Intelligences
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Instruction and hardware acceleration for MP-MLQ in G.723.1
655
Instruction Assist System in Intelligent Space for Instruction of Taijiquan Motions
656
Instruction at the X-ray Examination for the Hearing Handicapped People
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Instruction based BIST for board/system level test external memories and interconnects
658
Instruction based bist for board/system level test of external memories and internconnects
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Instruction based memory distance analysis and its application to optimization
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Instruction based power consumption estimation methodology
661
Instruction based testbench architecture
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Instruction buffer mode for multi-context Dynamically Reconfigurable Processors
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Instruction buffer with limited control flow and loop nest support
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Instruction buffering exploration for low energy VLIWs with instruction clusters
665
Instruction buffering for nested loops in low power design
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Instruction buffering for nested loops in low-power design
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Instruction buffering to reduce power in processors for signal processing
668
Instruction Cache Design for Energy-Aware Embedded Processors by Using Backward Branch Information
669
Instruction cache design space exploration for embedded software applications
670
Instruction Cache Energy Saving Through Compiler Way-Placement
671
Instruction cache fetch policies for speculative execution
672
Instruction Cache in Hard Real-Time Systems: Modeling and Integration in Scheduling Analysis Tools with AADL
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Instruction Cache Locking for Real-Time Embedded Systems with Multi-tasks
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Instruction Cache Locking Using Temporal Reuse Profile
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Instruction cache locking using temporal reuse profile
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Instruction cache organisation for embedded low-power processors
677
Instruction cache prefetching directed by branch prediction
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Instruction cache prefetching with extended BTB
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Instruction Cache Replacement Policies and Organizations
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Instruction cache tuning for embedded multitasking applications
681
Instruction Cache Tuning for Embedded Multitasking Applications
682
Instruction Clustering Analysis for Network Protocol´s Abnormal Behavior
683
Instruction code mapping for performance increase and energy reduction in embedded computer systems
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Instruction compression and encoding for low-power systems
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Instruction Compression in Runtime for Embedded Systems
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Instruction decode mechanism for embedded real-time Java processor JPOR-32
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Instruction Decoder Module Design of 32-bit RISC CPU Based on MIPS
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Instruction decoders based on pattern factorization
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Instruction design on communication of information technology training
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Instruction Display for Learning Taijiquan Motions
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Instruction Display of Motion for Taijiquan in Intelligent Space
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Instruction distribution heuristics for quad-cluster, dynamically-scheduled, superscalar processors
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Instruction Emulation and OS Supports of a Hybrid Binary Translator for x86 Instruction Set Architecture
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Instruction encoding synthesis for architecture exploration using hierarchical processor models
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Instruction encoding techniques for area minimization of instruction ROM
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Instruction execution trade-offs for SIMD vs. MIMD vs. mixed mode parallelism
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Instruction Experiment of Study on BAF to Extract Potassium from Molasses Alcohol Wastewater
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Instruction Fault Attack on the Miller Algorithm in a Pairing-Based Cryptosystem
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Instruction fetch architectures and code layout optimizations
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Instruction fetch deferral using static slack
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Instruction fetch energy reduction using loop caches for embedded applications with small tight loops
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Instruction fetch mechanisms for multipath execution processors
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Instruction fetch mechanisms for VLIW architectures with compressed encodings
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Instruction fetching: Coping with code bloat
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Instruction flow-based front-end throttling for power-aware high-performance processors
706
Instruction Folding Compression for Java Card Runtime Environment
707
Instruction Folding for an Asynchronous Java Co-Processor
708
Instruction folding in Java processor
709
Instruction for reinforcement learning agent based on sub-rewards and forgetting
710
Instruction for Remote MR Cooperative Work with Captured Still Worker´s View Video
711
Instruction Format Based Selective Execution for Register Port Complexity Reduction in High-Performance Processors
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Instruction generation for hybrid reconfigurable systems
713
Instruction identification algorithm of instruction-set extensions based on relationship matrix
714
Instruction in electronic drawing for students of radio and electronic engineering at professional level
715
Instruction in Problem Structuring and Analysis Through Problem Frames
716
Instruction in software project communication through guided inquiry and reflection
717
Instruction issue logic for high-performance, interruptible, multiple functional unit, pipelined computers
718
Instruction Issue Logic in Pipelined Supercomputers
719
Instruction knowledge acquisition for reinforcement learning scheme by PSO algorithm
720
Instruction level analytic prediction of parallel CPU architecture performance
721
Instruction level and operating system profiling for energy exposed software
722
Instruction level motion control of virtual human for maintenance process simulation
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Instruction level power analysis and optimization of software
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Instruction Level Power Analysis for Low Power VLSI Applications
725
Instruction level power model and its application to general purpose processors
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Instruction level power model of microcontrollers
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Instruction level power profiling
728
Instruction level profiling and evaluation of the IBM RS/6000
729
Instruction level test for parallel multipliers
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Instruction level test methodology for CPU core software-based self-testing
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Instruction Level Timing Mechanisms for Accurate Real-Time Task Scheduling
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Instruction list verification using a Petri net semantics
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Instruction Memory Architecture Evaluation on Multiprocessor FPGA MPEG-4 Encoder
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Instruction merging to increase parallelism in VLIW architectures
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Instruction modes for joint spatial reference between naive users and a mobile robot
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Instruction of a technical subject with a general problem-solving methodology
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Instruction of arm motion for calligraphy using vibrotactile stimulations
738
Instruction over online social networks: Where does the platform lead?
739
Instruction overhead and data locality effects in superscalar processors
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Instruction packing: reducing power and delay of the dynamic scheduling logic
741
Instruction panels for operating mv switchgear installed under cover in distribution networks
742
Instruction panels for operating MV switchgear installed under cover in distribution networks
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Instruction path coprocessors
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Instruction Precomputation for Fault Detection
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Instruction precomputation with memoization for fault detection
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Instruction prediction for step power reduction
747
Instruction Prefetching of Systems Codes with Layout Optimized for Reduced Cache Misses
748
Instruction prefetching using Basicblock prediction
749
Instruction prefetching using branch prediction information
750
Instruction pre-processing in trace processors
751
Instruction randomization self test for processor cores
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Instruction recycling on a multiple-path processor
753
Instruction Re-encoding Facilitating Dense Embedded Code
754
Instruction reliability analysis for embedded processors
755
Instruction reorganization for a variable-length pipelined microprocessor
756
Instruction replication for clustered microarchitectures
757
Instruction replication for reducing delays due to inter-PE communication latency
758
Instruction replication: reducing delays due to inter-PE communication latency
759
Instruction scheduler generation for retargetable compilation
760
Instruction scheduling and executable editing
761
Instruction scheduling based on energy and performance constraints
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Instruction scheduling for a superscalar architecture
763
Instruction scheduling for clustered VLIW architectures
764
Instruction scheduling for clustered VLIW DSPs
765
Instruction scheduling for dynamic hardware configurations [M-JPEG encoder case study]
766
Instruction scheduling for instruction level parallel processors
767
Instruction scheduling for low power on dynamically variable voltage processors
768
Instruction scheduling for performance enhancement on a superscalar-based multiprocessor
769
Instruction scheduling for power reduction in processor-based system design
770
Instruction scheduling for reliability-aware compilation
771
Instruction scheduling for the HP PA-8000
772
Instruction scheduling for the Motorola 88110
773
Instruction Scheduling for Variation-Originated Variable Latencies
774
Instruction scheduling for VLIW processors under variation scenario
775
Instruction scheduling of VLIW architectures for balanced power consumption
776
Instruction Scheduling on Variable Latency Functional Units of VLIW Processors
777
Instruction scheduling using genetic algorithm with taboo search for TTA-like processors
778
Instruction Scheduling with Release Times and Deadlines on ILP Processors
779
Instruction Selection and Scheduling for DSP Kernels on Custom Architectures
780
Instruction selection for embedded DSPs with complex instructions
781
Instruction Selection in ASIP Synthesis Using Functional Matching
782
Instruction selection using binate covering for code size optimization
783
Instruction selection, resource allocation, and scheduling in the AVIV retargetable code generator
784
Instruction set and functional unit synthesis for SIMD processor cores
785
Instruction set architecture enhancements for video processing
786
Instruction Set Architecture Extensions for a Dynamic Task Scheduling Unit
787
Instruction set architecture of an efficient pipelined dataflow architecture
788
Instruction set architecture of the determined memory access processor
789
Instruction set architecture scheme for multiple fixed-width instruction sets and conditional execution
790
Instruction set architecture to control instruction fetch on pipelined processors
791
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation
792
Instruction set customization for area-constrained FPGA designs
793
Instruction set customization of application specific processors for network processing: a case study
794
Instruction set definition and instruction selection for ASIPs
795
Instruction set design and optimizations for address computation in DSP architectures
796
Instruction Set Design for a Nibble-Serial Signal Processing Element
797
Instruction set emulation for rapid prototyping of SoCs
798
Instruction Set Encoding Optimization for Code Size Reduction
799
Instruction Set Enhancements for High-Performance Multicore Execution on the REALJava Platform
800
Instruction Set Extension Exploration in Multiple-Issue Architecture
801
Instruction set extension for fast elliptic curve cryptography over binary finite fields GF(2m)
802
Instruction set extension for high throughput disparity estimation in stereo image processing
803
Instruction set extension for long integer modulo arithmetic on RISC-based smart cards
804
Instruction set extension in the NIOS II: A floating point divider for complex numbers
805
Instruction set extension using Microblaze processor
806
Instruction Set Extensions for AES Processing on a Multithreaded Software Defined Radio Platform
807
Instruction set extensions for computation on complex floating point numbers
808
Instruction Set Extensions for Cryptographic Hash Functions on a Microcontroller Architecture
809
Instruction set extensions for Dynamic Time Warping
810
Instruction Set Extensions for Enhancing the Performance of Symmetric-Key Cryptography
811
Instruction set extensions for multi-threading in LEON3
812
Instruction set extensions for photonic synchronous coalesced accesses
813
Instruction set extensions for Reed-Solomon encoding and decoding
814
Instruction set extensions for Triple DES processing on a multi-threaded software-defined radio platform
815
Instruction set extensions of AES algorithms for 32-bit processors
816
Instruction set innovations for Convey´s HC-1 computer
817
Instruction Set Innovations for the Convey HC-1 Computer
818
Instruction set mapping for performance optimization
819
Instruction set modeling of micro-controllers for power converter simulation
820
Instruction set processor specifications (ISPS): The notation and its applications
821
Instruction Set Processor Specifications for Simulation, Evaluation, and Synthesis
822
Instruction set selection for ASIP design
823
Instruction set support and algorithm-architecture for fully parallel multi-standard soft-output demapping on baseband processors
824
Instruction Sets and Beyond: Computers, Complexity, and Controversy
825
Instruction sets and their implementations
826
Instruction Shuffle: Achieving MIMD-like Performance on SIMD Architectures
827
Instruction Splitting for Efficient Code Compression
828
Instruction stream mutation for non-deterministic processors
829
Instruction subsetting: Trading power for programmability
830
Instruction system for optimization lancing operation of boiler heating surface based on expert system
831
Instruction Through The Ages: Building Pervasive Virtual Instructors for Life Long Learning
832
Instruction Trace Compression for Rapid Instruction Cache Simulation
833
Instruction Transfer And Storage Exploration for Low Energy VLIWs
834
Instruction usage and the memory gap problem
835
Instruction window size trade-offs and characterization of program parallelism
836
Instruction without destruction
837
Instructional animation, segmentation and user control strategies
838
Instructional Blueprinting: a systems engineering approach to workforce development
839
Instructional design and culturally diverse learners
840
Instructional design based on reusable learning objects: applying lessons of object-oriented software engineering to learning systems design
841
Instructional design for collaborative e-learning
842
Instructional design for online course delivery in engineering management: Synthesizing learning styles, pedagogical perspectives and contingency factors
843
Instructional design for situational Chinese mobile learning
844
Instructional Design for Stem-Based Collaborative, Colocated Classroom Composition
845
Instructional design for training: A case study on educating computer users in complex tasks
846
Instructional design in a technological world: fitting learning activities into the larger picture
847
Instructional design in the vocational training on “computer networking”
848
Instructional design lessons technical communicators can learn from games
849
Instructional Design Model Promoting Transfer Using Group Development Method of e-Learning Teaching Materials by Learners Themselves
850
Instructional Design of a Workshop "How a Computer Works" Aimed at Improving Intuitive Comprehension and Motivation
851
Instructional Design of Exercise-Centric Teaching Materials on UML Modeling
852
Instructional design of multi-layer insulation of power cables
853
Instructional Design on "Selection of Instructional Media" Based on Webquest
854
Instructional design oriented towards the development of competences
855
Instructional Design Practices for Blended Learning
856
Instructional design using component-based development and learning object classification
857
Instructional Design with PoEML in a E-learning-as-a-Service Model. Mixing Web and IPTV Learning Experiencies
858
Instructional design with practical problems using co-simulation
859
Instructional design: a framework for designing computer-based training programs
860
Instructional Domain Analysis: A Methodological Approach to Service-Oriented Learning
861
Instructional Expertise for Phrase Singing and its Application for a Chorus Learning Support System
862
Instructional implications for adopting mobile technology in the teaching and learning of writing in English in international joint educational programs in Wuhan Polytechnic
863
Instructional material and interactive modules for discrete event dynamic systems
864
Instructional Media and Teaching Methods for Engaging Children with Computer Programming
865
Instructional Media for Continuing Education
866
Instructional m-Learning System Design Based on Learners: MPrinceTool
867
Instructional Model for Building Effective Big Data Curricula for Online and Campus Education
868
Instructional Module Development (IMODTM) system: Building faculty expertise in outcome-based course design
869
Instructional Mutation Ant Colony Algorithm in Application of Reservoir Operation Chart Optimization
870
Instructional objectives and bench examinations in circuits laboratories
871
Instructional overview of IEEE 1349-2001-guide for the application of electric motors in class I, division 2 hazardous (classified) locations
872
Instructional preferences on e-learning course of school secretary according to the virtual tutors
873
Instructional Scaffolding for Online Courses
874
Instructional scaffolding in online collaborative learning environment for knowledge construction among engineering students
875
Instructional Scaffolding in Online Learning Environment: A Meta-analysis
876
Instructional Simulations for Teaching High School Computer Science Concepts: A Technology Acceptance Perspective
877
Instructional Software Analysis: Lessons from Software Development Process Improvement
878
Instructional software for visualizing optical phenomena
879
Instructional strategies for e-learning
880
Instructional strategies for teaching science online
881
Instructional Support for Teachers and Guided Feedback for Students in an Adaptive eLearning Environment
882
Instructional system design: its role in coast guard training and how it can influence the development of training materials
883
Instructional Technology and Continuing Engineering Studies
884
Instructional technology environments for engineering outreach
885
Instructional technology for cross-disciplinary learning
886
Instructional testing through wireless handheld devices
887
Instructional tools for promoting self-directed learning skills in freshmen
888
Instructional use of analysis/design techniques in nonlinear control systems for the undergraduate curriculum
889
Instructional use of declarative languages for the study of machine transients
890
Instructional use of declarative languages for the study of machine transients
891
Instructional versus Educational Systems Design (ESD): is there a difference?
892
Instructional Video Content Analysis Using Audio Information
893
Instructional-Design Theories Applied on a Web-Based Learning Application
894
Instructional-Designed Strategy for Massive Multiplayer Online M-learning
895
Instruction-based delay fault self-testing of pipelined processor cores
896
Instruction-based delay fault self-testing of processor cores
897
Instruction-based high-efficient synchronization in a many-core Network-on-Chip processor
898
Instruction-Based Online Periodic Self-Testing of Microprocessors with Floating-Point Units
899
Instruction-based reuse-distance prediction for effective cache management
900
Instruction-Based Self-Testing of Delay Faults in Pipelined Processors
901
Instruction-based self-testing of processor cores
902
Instruction-based system-level power evaluation of system-on-a-chip peripheral cores
903
Instruction-based system-level power evaluation of system-on-a-chip peripheral cores
904
Instruction-Cache Attack on DSA Adopting Square-Multiply Method
905
Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings
906
Instruction-driven clock scheduling with glitch mitigation
907
Instruction-driven timing CPU model for efficient embedded software development using OVP
908
Instruction-driven wake-up mechanisms for Snoopy TAP controller
909
Instructionless processor architecture using dynamically reconfigurable logic
910
Instruction-level characterization of scientific computing applications using hardware performance counters
911
Instruction-level DfT for testing processor and IP cores in system-on-a-chip
912
Instruction-level distributed processing
913
Instruction-level distributed processing for symmetric-key cryptography
914
Instruction-Level Fault Tolerance Configurability
915
Instruction-level hardware/software partition through DFG exploration
916
Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller
917
Instruction-Level Impact Comparison of RT- vs. Gate-Level Faults in a Modern Microprocessor Controller
918
Instruction-Level Instantaneous Power Modeling for VLIW Processor
919
Instruction-Level Optimization of H.264 Encoder Using SIMD Instructions
920
Instruction-level parallel processors-dynamic and static scheduling tradeoffs
921
Instruction-level Parallelism in Prolog: Analysis and Architectural Support
922
Instruction-level power consumption estimation embedded processors low-power applications
923
Instruction-level power estimation for embedded VLIW cores
924
Instruction-Level Program and Processor Modeling
925
Instruction-level simulation of a cluster at scale
926
Instruction-Matrix-Based Genetic Programming
927
Instructions for AP-S & and URSI Authors
928
Instructions for AP-S and IRSI Authors
929
Instructions for AP-S and URSI Authors
930
Instructions for AP-S and URSI Authors
931
Instructions for AP-S and URSI Authors
932
Instructions for authors
933
Instructions for Authors
934
Instructions for Authors
935
Instructions for Authors
936
Instructions for Authors
937
Instructions for Authors
938
Instructions for Authors
939
Instructions for Authors
940
Instructions for Authors
941
Instructions for Authors
942
Instructions for Authors
943
Instructions for Authors
944
Instructions for Authors
945
Instructions for Authors
946
Instructions for Authors
947
Instructions for HICSS-37 CD-ROM users
948
Instructions for preparing the manuscripts
949
Instructions for preparing the manuscripts
950
Instructions for preparing the manuscripts
951
Instructions to Authors of Papers to be Published in the Transactions on Broadcasting
952
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
953
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
954
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
955
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
956
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
957
Instructions to Authors of Papers to be published in the Transactions on consumer Electronics
958
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
959
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
960
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
961
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
962
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
963
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
964
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
965
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
966
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
967
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
968
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
969
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
970
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
971
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
972
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
973
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
974
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
975
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
976
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
977
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
978
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
979
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
980
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
981
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
982
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
983
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
984
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
985
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
986
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
987
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
988
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
989
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
990
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
991
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
992
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
993
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
994
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
995
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
996
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
997
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
998
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
999
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
1000
Instructions to Authors of Papers to be Published in the Transactions on Consumer Electronics
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