بر اساس عنوان
158
Chip clustering with mutual information on multiple clock tests and its application to yield tuning202
Chip embedding technology developments leading to the emergence of miniaturized system-in-packages203
Chip embedding technology developments leading to the emergence of miniaturized system-in-packages219
Chip Hardware-in-the-Loop simulation coupling optimization through new algorithm analysis technique230
Chip implementation with combined temperature sensor and reference devices based on DZTC principle242
Chip interleaving for performance improvement of coded DS-CDMA systems in Rayleigh fading channels364
Chip scale polymer stud grid array packaging and reliability based on low cost flip chip processing371
Chip shots445
Chip-interleaved block-spread CDMA for the downlink with inter-cell interference and soft hand-off474
Chipless RFID strain sensors: A novel feasibility analysis in terms of conventional patch antennas513
Chip-level beamforming vs. symbol-level beamforming in coherent CDMA adaptive antenna array systems527
Chip-level electromigration measurement technique for multi-segmented interconnect test structures530
Chip-level Kalman filter equalization for the UMTS-FDD WCDMA downlink with multiple base stations579
Chip-on-Flexible Packaging for High-Power Flip-Chip Light-Emitting Diode by AuSn and SAC Soldering594
Chip-package co-design of a concurrent LNA in system-on-package for multi-band radio applications604
Chip-Package Co-modeling & Verification of Noise Coupling & Generation in CMOS DC/DC Buck Converter610
Chip-package interactions: Some combined package effects on copper/low-k interconnect delaminations645
Chips in 3D670
Chip-Scale Localized Synthesis of Carbon Nanotubes on Copper Microstructures via Inductive Heating681
Chip-scale packaging of power devices and its application in integrated power electronics modules682
Chip-scale packaging of power devices and its application in integrated power electronics modules721
Chip-to-chip optical wireless link feasibility using optical phased arrays on silicon-on-insulator729
Chip-to-wafer (C2W) 3D integration with well-controlled template alignment and wafer-level bonding766
Chiral plasmonic activity of cholesteric films formed by gold nanorods and cellulose nanocrystals785
Chirality selective synthesis and enrichment of single walled carbon nanotubes for macroelectronics786
Chirally Coupled Core Fibers at 1550-nm and 1064-nm for Effectively Single-Mode Core Size Scaling792
CHIRON: An energy-efficient chain-based hierarchical routing protocol in wireless sensor networks806
Chirp And Self-phase Modulation In Induced-grating Autocorrelation Measurements Of Ultrashort Pulses816
Chirp characteristics of optical combs in MZM-based flat comb generator with optical feedback loop892
Chirp reduction of directly modulated semiconductor lasers at 10 Gb/s by strong CW light injection918
Chirp UWB system with software defined receiver for industrial mobile ranging and autonomous control