<< مقالات لاتين فني مهندسي >>
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1
A "Back-to-Basics" Approach to Sizing Pulsed Alternators: How Much Energy Can You Deliver from a Given Volume?
2
A "basic" system of position control for the traversing tables of machine tools
3
A "better than" Nyquist pulse
4
A "biased" view from Glasgow [urban traffic control]
5
A "bit-bucket" data structure to optimize local search for microword length minimization
6
A "black-link" approach for sharing optical fiber infrastructure and enabling multi-services
7
A "brick" caching scheme for 3D medical imaging
8
A "Bunsetsu" speech recognition system using a top-down processor controlled by bottom-up information
9
A "C"-band rutile traveling-wave maser
10
A "Call to Arms"
11
A "capacitor" bridge builder based safe path planner for difficult regions identification in changing environments
12
A "Case-Study" Approach to Electrical Energy Engineering
13
A "Change \´n Play" Software Architecture Integrating CAD, CAE and Immersive Real-Time Environments
14
A "Chicken & Egg" Network Coding Problem
15
A "Clickless" Multi-Channel Volume Control I. C. with Serial Bus
16
A "cold" InP-based tunneling injection laser with greatly reduced Auger recombination and temperature dependence
17
A "cookbook" cost analysis procedure for medical information systems
18
A "critical impedance" based method for identifying harmonic sources
19
A "critical impedance"-based method for identifying harmonic sources
20
A "Critical-Impedance" Based Method for Identifying Harmonic Sources
21
A "Customer Satisfaction" Based Migration Approach toward NGN
22
A "debate" on nuclear power plant safety [review of 2 IEEE Spectrum articles)
23
A "Decision and Re-Solving" Beamformer for the PAM Communication System
24
A "defect level versus cost" system tradeoff for electronics manufacturing
25
A "differential" attack on Polly Cracker
26
A "digital" 6-bit ADC in 0.25-μm CMOS
27
A "divide and conquer" strategy based on situations to achieve reactive collision avoidance in troublesome scenarios
28
A "divide and conquer" technique for implementing wide dynamic range continuous-time filters
29
A "Fail-safe" circuit principle in semiconductor and solid-state systems
30
A "field-usable" diode-pumped /spl sim/120-nm wavelength-tunable CW mid-IR fiber laser
31
A "flight data recorder" for enabling full-system multiprocessor deterministic replay
32
A "flying-adder" architecture of frequency and phase synthesis with scalability
33
A "Flying-Adder" frequency synthesis architecture of reducing VCO stages
34
A "follow the perturbed leader"-type algorithm for zero-delay quantization of individual sequences
35
A "front Panel" Human Interface for FASTBUS
36
A "Goodness" criterion for any varactor diode as a high-order frequency multiplier
37
A "Greedy" Channel Router
38
A "Grid-free" Channel Router
39
A "Gridless" Variable-Width Channel Router for Macro Cell Design
40
A "hinge" model for the temporal dynamics of polarization mode dispersion
41
A "Lookahead" Router for Multilayer Printed Wiring Boards
42
A "low-cost" software radio test bed
43
A "Low-Tech" design experiment improving student work
44
A "make or buy" decision model with economies of scale
45
A "Microlithic" hearing aid amplifier
46
A "Monochromatic" Radio Frequency Accelerator Cavity
47
A "mouse-sized" gamma camera for biological imaging
48
A "Near-Optimum" Multiple Path Routing Algorithm for Space-Based SDI Networks
49
A "New" Crosslinking Process for Extruded Dielectric Cable
50
A "nonnegative PCA" algorithm for independent component analysis
51
A "Non-Restrictive" Artwork Verification Program for Printed Circuit Boards
52
A "One-Pin" LC Oscillator Circuit with a New Type of Amplitude Control
53
A "Panchromatic" stroboelectric tuner
54
A "Paradoxical" Solution To The Signature Problem
55
A "persistent-mode" magnet comprised of YBCO annuli
56
A "plug and play" computationally efficient approach for control design of large-scale nonlinear systems using cosimulation: a combination of two "ingredients"
57
A "Plug-and-Play\´ Framework to Enhance Heterogeneity and Versatility in Delay Tolerant Networks
58
A "powerful" issue!
59
A "rank-one" method for optimal control problems
60
A "Rayleigh-ness" test for DS/SS code acquisition
61
A "Reader-Centered" Approach to Online Information
62
A "real world" examination of PV system design and performance
63
A "Real-like" polarimetric weather radar data generation using physical and statistical models
64
A "Reef-Up" approach to classifying coral habitats from IKONOS imagery
65
A "Relay Node Division Duplex" Relaying Approach for MIMO Relay Networks
66
A "Report of the Secretary" Commentary
67
A "Research Experience for Undergraduates" in Coding and Communications
68
A "Safe approach" tracking controller for short headway AGT operation
69
A "Short-Cut" Method for Calculation of Harmonic Distortion in Wave Modulation
70
A "single authoring" programming model: the interaction logic
71
A "smart component" data model in PLM
72
A "Smart Medical Record" for the general practitioner supporting decision making and training in cardiology
73
A "smart" multimedia guide for indoor contextual navigation in cultural heritage applications
74
A "soft++" eFPGA physical design approach with case studies in 180nm and 90nm
75
A "somatic alphabet" approach to "sensitive skin"
76
A "space experiment" examining the response of a geosynchronous quartz crystal oscillator to various levels of solar activity
77
A "Step recovery" switching transistor
78
A "Stitch" in Time: Accurate Timekeeping with On-Chip Compensation
79
A "subtract-off" formulation for large finite conducting surfaces
80
A "Superresolution" target-tracking concept
81
A "tandem" single sideband fiber-optic system using a dual-electrode Mach-Zehnder modulator
82
A "theory of action" perspective on effective organizational change
83
A "Throw-and-Catch" Hybrid Control Strategy for Robust Global Stabilization of Nonlinear Systems
84
A "Time-domain" successive approximation method for some linear optimal stochastic systems
85
A "toggle switch" for RF applications - mechanical behavior simulation
86
A "Tonmeister" approach to the positioning of sound sources in a multichannel audio system
87
A "toolkit" for information technology proposal and project documentation
88
A "Two Ahead" Predictive Controller for Active Shunt Power Filters
89
A "two-step" synchronous sliding method of sub-nanosecond pulses for ultra-wideband (UWB) radio
90
A "Vibration" Method for Automatically Generating Test Cases Based on Formal Specifications
91
A "virtual student" leads to the possibility of optimiser agents in an ITS
92
A "virtual Tester" For Electrical Transients On Automotive Modules
93
A "Water Shell" Model for the Dielectric Properties of Hydrated Silica-filled Epoxy Nano-composites
94
A "Wavelength Shifter" for the University of Wisconsin Electron Storage Ring
95
A "Zoom-in" Scanning Array for Wireless Communications
96
A $(log n)^{Omega(1)}$ Integrality Gap for the Sparsest Cut SDP
97
A $(rm UCON_{ABC})$ Resilient Authorization Evaluation for Cloud Computing
98
A $3 Trillion Challenge to Computational Scientists: Transforming Healthcare Delivery
99
A $40 software-defined radio [Resources_Hands On]
100
A $5 smart blood pressure system
101
A ‘ No Panacea Theorem´ for Multiple Classifier Combination
102
A ± 0.75V opamp with rail-to-rail input/output range
103
A µ255 Encoder Requiring No Precision Components
104
A &#60;12mW, 0.7–3.2GHz receiver with resonant multi-phase LO and current reuse harmonic rejection baseband
105
A Σ Δ modulator with extended supply voltages in 0.8 µm SOI CMOS for direct ground referred instrumentation interfacing
106
A δ-Doped InGaP/InGaAs pHEMT With Different Doping Profiles for Device-Linearity Improvement
107
A λ/4 and λ/2 shift method for elimination of unwanted wall–echoes in radar–anechoic chambers
108
A μ Approach to Roust Staility Analysis of nD Discrete-time Systems
109
A π Small-Signal Model of MEMS Series Switches Based on the Parameter- Extraction Method
110
A "Cloud Lifestyle": The Diffusion of Cloud Computing Applications and the Effect of Demographic and Lifestyle Clusters
111
A "Design First" Approach to Visualization Innovation
112
A "Dynamic Tunnel" Defense Mechanism Based on GTP Protocol
113
A "MICROLITHIC" hearing aid amplifier
114
A "Never-Loose" Strategy to Play the Game of Tic-Tac-Toe
115
A "Piano Movers" Problem Reformulated
116
A "Smart Bedroom" as an Active Database System
117
A "unimodal" blind equalization criterion
118
A "Virtual SONET" routing architecture for ad hoc networks in environmental monitoring and emergency management
119
A +27.3dBm transformer-based digital Doherty polar power amplifier fully integrated in bulk CMOS
120
A +32 dBm 1.85 GHz class-D outphasing RF PA in 130nm CMOS for WCDMA/LTE
121
A +33dBm 1.9 GHz linear CMOS power amplifier with MOS-level linearizers
122
A ΔΣ-Digitized RF Transmitter
123
A Σ Δ fractional-N closed-loop modulator for DECT
124
A ΣΔ fractional- N synthesizer for GSM standard specifications
125
A ΣΔ Fractional-N PLL with Multiple Charge Pumps and Capacitance Scaling Scheme
126
A β-γ coincidence system for environmental 131
127
A κ - κ Error Correcting Procedure for Nonparametric Imperfectly Supervsed Learning
128
A μ approach for sequential design of decentralized control systems
129
A μ-based approach to small-signal stability analysis of an interconnected distributed energy resource unit and load
130
A μ-calculus approach for the synthesis of discrete-event supervisors with safety specifications
131
A μp-controlled flying-spot scanner with an intelligent A/D-converter unit
132
A μP-Controlled Sliding Integrating-Type Differentiator for Biomedical Signal Processing: Application to dc Ocular Rheography
133
A π-calculus based model for web services composition
134
A > 89% efficient LED driver with 0.5V supply voltage for applications requiring low average current
135
A « perlaborative » environment for sustainable cities design staff in a participative perspective. GIS and knowledge database
136
A ±0.4°C (3σ) −70 to 200°C time-domain temperature sensor based on heat diffusion in Si and SiO2
137
A ±1.5% nonlinearity 0.1-to-100A shunt current sensor based on a 6kV isolated micro-transformer for electrical vehicles and home automation
138
A ±15V interface IC for capacitive accelerometer
139
A ±5A battery current sensor with ±0.04% gain error from −55°C to +125°C
140
A ±60° Field-of-View, highly compact, 3×3 integrated photo-diode array sensor for dual-axis solar tracking
141
A ±6ms-accuracy, 0.68mm2 and 2.21μW QRS detection ASIC
142
A ±9 V fully integrated CMOS electrode driver for high-impedance microstimulation
143
A ×18 340 GHz InP HEMT multiplier chain
144
A ΓZ-source based hybrid power converter for battery-fuel cell hybrid electric vehicle
145
A ΔΣ ADC for low power sensor applications
146
A ΔΣ ADC using 4-bit SAR type quantizer for audio applications
147
A ΔΣ ADC using an LSB-first SAR quantizer
148
A ΔΣ CMOS ADC with 80-dB dynamic range and 31-MHz signal bandwidth
149
A ΔΣ fractional-N PLL with fast Auto-Frequency Calibration for CMMB tuners
150
A ΔΣ fractional-N synthesizer with customized noise shaping for WCDMA/HSDPA applications
151
A ΔΣ interface for MEMS accelerometers using electrostatic spring-constant modulation for cancellation of bondwire capacitance drift
152
A ΔΣ IR-UWB radar with sub-mm ranging capability for human body monitoring systems
153
A ΔΣ modulator with 3-Bit, 37-level pre-detective dynamic quantization
154
A ΔΣ-cyclic hybrid ADC for parallel readout sensor applications
155
A Δ∑ modulator based frequency hopping approach
156
A Δ∑-modulator-less digitally-controlled oscillator using fractional capacitors for GSM/EDGE transmitter
157
A ΔVt 0.2V to 1V 0.01mm2 9.7nW voltage reference in 65nm LP/GP CMOS
158
A Ε-domination Based Multi-objective Particle Swarm Optimization
159
A Λ-type system for electron spins in a mixed-type GaAs/AlAs quantum qell
160
A ΣΔ based direct all-digital frequency synthesizer with 20 Mbps frequency modulation capability and 3μs startup latency
161
A Σ-Δ fractional-N frequency synthesizer in 0.18µM CMOS technology
162
A ΣΔ modulator for low power energy meter application
163
A λ switched photonic network for the new transport backbone of Telecom Italia
164
A λ/2 loop antenna for GPS application in mini-laptop
165
A λ/30 resolution laser speckle pattern biosensor for dynamic studies on live samples
166
A μ-biomimetic flow sensor for medical and pharmaceutical applications
167
A μg resolution microacelerometer system with a second-order Σ-Δ readout circuitry
168
A μm-resolution heterogeneous tissue model for the magnetic stimulation of multifascicular sciatic nerve
169
A μ-synthesis approach to robust control of a wind turbine
170
A μ-synthesis-based approach to automate opioid injection in post-surgery patients
171
A μ-TLP system realized in MEMS technology
172
A π-matching network to eliminate the open-stopband in 1-D periodic leaky-wave antennas
173
A π-phase-shifted fiber Bragg grating fabricated using a single phase mask
174
A π-phase-shifted long-period-waveguide-grating on LiNbO3 fabricated by a two-step proton exchange
175
A ±1-Based Steganography by Minimizing the Distortion of First Order Statistics
176
A – 21.2 -dBm Dual-Channel UHF Passive CMOS RFID Tag Design
177
A –90 dBm Sensitivity Wireless Transceiver Using VCO-PA-LNA-Switch-Modulator Co-Design for Low Power Insect-Based Wireless Sensor Networks
178
A — 131dBc@1M PhaseNoise, 74% spectral efficiency, GA optimized FIR impulse radio UWB transmitter
179
A ‘Φ’ shaped compact dual band printed monopole antenna for Bluetooth and UWB applications
180
A ‘Charge and current’ formulation of the Electric Field Integral Equation
181
A ‘cool’ load balancer for parallel applications
182
A ‘cool’ way of improving the reliability of HPC machines
183
A ‘gas of circles’ phase field model and its application to tree crown extraction
184
A ‘historical case’ of Ontology-Based Data Access
185
A ‘Look Into’ Medical augmented reality
186
A ‘scalar’ discrete-time model for a digitally controlled h-bridge grid-connected inverter
187
A ‘stitched’ flexible light weight multilayer 16×16 antenna array on LCP
188
A ‘virtual experiments’ framework for inverse scattering
189
A ‘wicked problem’ — Predicting sos behaviour in tactical land combat with compromised C4ISR
190
A “Best Current Practice” for 3GPP-based cellular system security
191
A “big data” challenge — Turning smart meter voltage quality data into actionable information
192
A “Bottom-Up” Redefinition for Mobility and the Effect of Poor Tube–Tube Contact on the Performance of CNT Nanonet Thin-Film Transistors
193
A “Class-A2” ultra-low-loss magnetic ballast for T5 fluorescent lamps
194
A “Class-A2” Ultra-Low-Loss Magnetic Ballast for T5 Fluorescent Lamps—A New Trend for Sustainable Lighting Technology
195
A “corner solver” for motorcycles as a tool for the development of a virtual rider
196
A “divide-by-odd number” direct injection CMOS LC injection-locked frequency divider
197
A “dynamic” land masking algorithm for synthetic aperture radar images
198
A “Flying-Adder” On-Chip Frequency Generator for Complex SoC Environment
199
A “GAP-model” based framework for online VVoIP QoE measurement
200
A “Globally” Convergent Controller for Multi-Machine Power Systems Using Structure-Preserving Models
201
A “globally” convergent controller for transient stability of multi-machine power systems using structure-preserving models
202
A “Human-in-the-loop” approach for resolving complex software anomalies
203
A “joint+marginal” algorithm for polynomial optimization
204
A “learn 2D, apply 3D” method for 3D deconvolution microscopy
205
A “linear” high-contrast gratings hollow-core waveguide and its system level performance
206
A “microSD”sized RF transceiver manufactured as an embedded system-in-package
207
A “Mixed” small gain and passivity theorem for an interconnection of linear time-invariant systems
208
A “network-paging” based method for wide-area live-migration of VMs
209
A “PARtially COnnected Neural Evolutionary” model serving as the basis for building China’s first artificial brain
210
A “Ping-pong” Protocol with Authentication
211
A “plug-n-play” computationally efficient approach for control design of large-scale nonlinear systems using co-simulation
212
A “Power-on-demand” optical transceiver design for green access and in-home network applications
213
A “Probe-Lift” MOS-Capacitor Technique for Measuring Very Low Oxide Leakage Currents and Their Effect on Generation Lifetime Extraction
214
A “raised-fractional-power” wireless transmitter power consumption model
215
A “Random Chemistry” Algorithm for Identifying Collections of Multiple Contingencies That Initiate Cascading Failure
216
A “Random Chemistry” algorithm for identifying collections of multiple contingencies that initiate cascading failure
217
A “Reciprocity” Property of the Unbiased Cramér–Rao Bound for Vector Parameter Estimation
218
A “research experience for undergraduates” in signal processing, coding and communications
219
A “Sequentially Drilled” Joint Congruence (SeDJoCo) Transformation With Applications in Blind Source Separation and Multiuser MIMO Systems
220
A “sheltered website” framework concept for assistive technology software
221
A “string of feature graphs” model for recognition of complex activities in natural videos
222
A “superimposed frequency” motor test
223
A “true” electrical cell model for timing, noise, and power grid verification
224
A “Try before you buy” approach for networked digital home appliances and services
225
A “Twisting and Bending” Model-Based Nonrigid Image Registration Technique for 3-D Ultrasound Carotid Images
226
A “Universal” life-test system for electromechanical relays
227
A “UWB” half-wavelength dipole for low-frequency gain reference
228
A “volume method” for simulation of flood scene
229
A “Wiimote”-based spatio-temporal wireless channel sounder (non-refereed)
230
A ”multi-user” approach towards a channel decoder for convolutional, turbo and LDPC codes
231
A ∑Δ based DC-DC converter with supply noise suppression
232
A −1.8V to 0.9V body bias, 60 GOPS/W 4-core cluster in low-power 28nm UTBB FD-SOI technology
233
A −104dBc/Hz in-band phase noise 3GHz all digital PLL with phase interpolation based hierarchical time to digital convertor
234
A −115dB PSRR CMOS bandgap reference with a novel voltage self-regulating technique
235
A −131-dBc/Hz, 20-MHz MEMS oscillator with a 6.9-mW, 69-kΩ, gain-tunable CMOS TIA
236
A −173 dBc/Hz @ 1 MHz offset Colpitts oscillator using AlN contour-mode MEMS resonator
237
A −189 dBc/Hz FOMT wide tuning range Ka-band VCO using tunable negative capacitance and inductance redistribution
238
A −194 dBc/Hz FOM interactive current-reused QVCO (ICR-QVCO) with capacitor-coupling self-switching sinusoidal current biasing (CSSCB) phase noise reduction technique
239
A −19dBm sensitivity integrated RF-DC converter with regulated output voltage for powering UHF wireless sensors
240
A −32dBm sensitivity RF power harvester in 130nm CMOS
241
A −70dBm-sensitivity 522Mbps 0.19nJ/bit-TX 0.43nJ/bit-RX transceiver for TransferJet™ SoC in 65nm CMOS
242
A −72 dB @ 2 MHz IM3 CMOS tunable pseudo-differential transconductor
243
A −78dBm sensitivity super-regenerative receiver at 96 GHz with quench-controlled metamaterial oscillator in 65nm CMOS
244
A −90dBm sensitivity wireless transceiver using VCO-PA-LNA-switch-modulator co-design for low power insect-based wireless sensor networks
245
A ∼10kW W-Band Gyro-BWO using a helically corrugated waveguide
246
A ≪5mW/Gb/s/link, 16Ã\x9710Gb/s Bi-Directional Single-Chip CMOS Optical Transceiver for Board-Level Optical Interconnects
247
A &P for MIMO comm [breaker page]
248
A &P for mobile comm [breaker page]
249
A γ effect on the power MOSFET
250
A γ-attenuation problem for discrete-time time-varying stochastic systems with multiplicative noise
251
A ⩾1.5 TeV superconducting synchrotron design for the Fermilab tunnel
252
A “bump in the stack” encryptor for MS-DOS systems
253
A “cold” discharge mechanism for low-noise fast charge amplifiers
254
A “cold” discharge mechanism for low-noise fast charge amplifiers
255
A “coming and going” approach to specification construction: a scenario
256
A “constrain and move” approach to distributed object manipulation
257
A “corporate technology stock” model-determining total R&D expenditure and effective investment pattern
258
A “design for verification” methodology
259
A “design of experiment” and statistical approach to enhance the “generalised response surface” method in the optimisation of multiminima problems
260
A “divide and conquer” technique for the design of wide dynamic range continuous time filters
261
A “double-face” bit-serial architecture for the 1D discrete wavelet transform
262
A “dual-tree” scheme for fault-tolerant multicast
263
A “framework” for object oriented frameworks design
264
A “GaAs on Si” PLL frequency synthesizer IC using chip on chip technology
265
A “Green TCP/IP” to reduce electricity consumed by computers
266
A “hybrid intelligent network (IN)” solution for local number portability (LNP) (or how you can take it with you)
267
A “multi-frequency code” adaptive threshold detector implementation based on TMS320C25 digital signal processor
268
A “mutual update” training algorithm for fuzzy adaptive logic control/decision network (FALCON)
269
A “next generation” architecture for HTTP
270
A “path” for enhancement of engineering enrollments: Attitudes toward energy concepts
271
A “persistent connection” model for mobile and distributed systems
272
A “power-mapping” variable-speed control technique for a constant-frequency conversion system powered by a IC engine and PM generator
273
A “recruiting neural-gas” for function approximation
274
A “robust” convergent visual servoing system
275
A “Seed-Refine” Algorithm for Detecting Protein Complexes From Protein Interaction Data
276
A “self-decorrelating” technique to enhance blind space-time RAKE receivers with single-user-type DS-CDMA detectors
277
A “Sequential"” optimization technique for forward treatment planning for IMRT
278
A “smart” switch based three-phase ZVS PWM topology
279
A “stochastic” convolution that describes both image blur and image noise using linear-systems theory
280
A “TINA light“ service architecture for the Internet-telecom scenario
281
A “turnkey" optoelectronic oscillator with low acceleration sensitivity
282
A “Winner-Take-All” IC for determining the crystal of interaction in PET detectors
283
A “wrap-around”, high strength gradient set for orthopaedic MRI
284
A < 1 pJ sub-VT cardiac event detector in 65 nm LL-HVT CMOS
285
A μ analysis technique without frequency gridding
286
A μ-magnetometer based on electron tunneling
287
A μ-synthesis based control for compliant manoeuvres
288
A μ-synthesis robust SVC control design
289
A μWatt postage stamp PC
290
A ν-gap distance for uncertain and nonlinear systems
291
A ν-insensitive SVM approach for compliance monitoring of the conservation reserve program
292
A νMOS soft-maximum current mirror
293
A Π-Σ network based EMG identification method
294
A π/4-shifted DQPSK demodulator for a personal mobile communications system
295
A ± 1.5 V high frequency four quadrant current multiplier
296
A ±1 V four-quadrant analog BiCMOS multiplier
297
A ±1.5 V CMOS four-quadrant analogue multiplier using 3 GHz analogue squaring circuits
298
A ±1.5 V, 4 MHz low-pass Gm-C filter in CMOS
299
A ±1.5-V, 4-MHz CMOS continuous-time filter with a single-integrator based tuning
300
A ±150 MVAr STATCOM for Northeast Utilities´ Glenbrook substation
301
A ±1-g dual-axis linear accelerometer in a standard 0.5-μm CMOS technology for high-sensitivity applications
302
A ±25 ps jitter 1.9 V CMOS PLL for UltraSPARC microprocessor
303
A ±5-V CMOS analog multiplier
304
A ΣΔ A/D converter insensitive to SEU effects
305
A ΣΔ A/D converter realized by using ST52X440 microcontroller
306
A Σ-Δ fractional-N frequency synthesizer using a wide-band integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications
307
A Σ-Δ fractional-N synthesizer with a fully-integrated loop filter for a GSM/GPRS direct-conversion transceiver
308
A Σ-Δ frequency discriminator based synthesizer
309
A ΣΔ modulation based analog BIST system with a wide bandwidth fifth-order analog response extractor for diagnosis purpose
310
A Σ-Δ modulator architecture reducing intermodulation of tones near fs/2 into the baseband
311
A Σ-Delta synthesizer phase noise optimization for multi-symbol rate digital microwave radio
312
A &thetas;(1) algorithm for modulo addition
313
A &thetas;(log n) algorithm for modulo multiplication
314
A (μ, λ) evolutionary and particle swarm hybrid algorithm, with an application to dinosaur gait optimization
315
A (ΔW - Pa) Rule-based Power System Stabilizer Design Using Multi-layer Zonal Bang-bang Control
316
A (μ + λ) evolutionary algorithm for reconstruction of SPECT data
317
A (d, k, c)=(0, 3, 5/2) rate 8/10 modulation code
318
A (0, 1)-quadratic programming based relay selection method
319
A (1.5 + ε)-Approximation Algorithm for Unsigned Translocation Distance
320
A (1+µ)-approximate algorithm for k-means problem based on balancing constraint
321
A (1+1) Adaptive Memetic Algorithm for the Maximum Clique Problem
322
A (1+e)-Approximation Algorithm for Sorting by Short Block-Moves
323
A (100) silicon stress test chip with optimized piezoresistive sensor rosettes
324
A (16, 9, 6, 5, 4) error-correcting DC free block code
325
A (2, 3) Threshold Secret Sharing Scheme Using Sudoku
326
A (2,2) secret sharing scheme for visual cryptography without Pixel Expansion
327
A (204,188) Reed-Solomon decoder using decomposed Euclidean algorithm
328
A (208,192;8) Reed-Solomon decoder for DVD application
329
A (256×256) pixel 76.7mW CMOS imager/ compressor based on real-time In-pixel compressive sensing
330
A (3 + 3)-phase voltage and current source of high stability
331
A (35 – 45) GHz low power direct-conversion Gilbert-cell mixer in 0.13µm GaAs pHEMT technology
332
A (4,12) circular signal set for satellite transmission
333
A (4:2) adder for unified GF (p) and GF (2n) Galois field multipliers
334
A (48, 31, 8) linear code (Corresp.)
335
A (50,2,4) nonbinary LDPC convolutional code decoder chip over GF(256) in 90nm CMOS
336
A (54, 18) code with weights divisible by four
337
A (64,45) Triple Error Correction Code for Memory Applications
338
A (CS)2 approach to inverse scattering
339
A (design-oriented) reliability model for active phased arrays in satellite communication systems
340
A (fairly) simple circuit that (usually) sorts
341
A (FM/DRDPE)-based approach to improve federated learning optimizer
342
A (Ga,Al) as Semiconductor Scintillator with Monolithically Integrated Photodiode: A New Detector
343
A (historical) review of the six-port measurement technique
344
A (Leveled) fully homomorphic encryption scheme based on error-free approximate GCD
345
A (m, m)VCS with consistent size reconstruction using full binary tree
346
A (max - plus)-based approach for charging management of electric vehicles
347
A (Max, +)-linear model for the analysis of urban traffic networks
348
A (max, plus) modelling approach for the evaluation of travelling times in a public transportation system
349
A (max,+) algebra approach for linear time-varying constrained systems
350
A (min, ×) network calculus for multi-hop fading channels
351
A (mu + lambda) - GP Algorithm and its use for Regression Problems
352
A (n, n) secret image sharing scheme based on array scrambling
353
A (r)evolutionary concept for low voltage plasma generation at atmospheric pressure
354
A (Radical) Proposal Addressing the Non-scalability of the Irregular MPI Collective Interfaces
355
A (Re)Configuration Mechanism for Resource-Constrained Embedded Systems
356
A (SEMI)-blind equalization technique for wireless burst transmission systems
357
A (simplified) Bluetooth maximum a posteriori probability (MAP) receiver
358
A (sub)graph isomorphism algorithm for matching large graphs
359
A (t, n) Secret Sharing Scheme for Image Encryption
360
A (t, n) Threshold Signature Scheme Against Conspiracy Attack
361
A (t, n)-Threshold Verified Multi-secret Sharing Scheme Based on ECDLP
362
A (t,n)-Threshold Group Signature Scheme Based on Compartmented Secret Sharing
363
A (t;w) threshold scheme over insecure channels
364
A (Timed) State-Transition Semantics for Reflective Petri Nets
365
A .NET application searching for data in a log file of the KUKA industrial welding robot
366
A .NET framework for an integrated fault diagnosis and failure prognosis architecture
367
a .NET Remoting-Based Distributed Simulation Approach for DEVS and Cell-DEVS Models
368
A .NET solution for distributed computing applications
369
A /spl beta/-error elimination in the translinear reduction of the "log-antilog" multiplier/divider
370
A /spl Delta//spl Sigma/ DAC with reduced activity data weighted averaging and anti-jitter digital filter
371
A /spl Delta//spl Sigma/ fractional-N frequency synthesizer with a multi-band PMOS VCOs for 2.4 and 5GHz WLAN applications
372
A /spl Delta//spl Sigma/PLL for 14 b 50 ksample/s frequency-to-digital conversion of a 10 MHz FM signal
373
A /spl lambda//2 CPW resonator BPF with multiple attenuation poles and its miniaturization
374
A /spl lambda//4-shifted sampled or superstructure grating widely tunable twin-guide laser
375
A /spl mu/-analysis application to stability of optical networks
376
A /spl pi//4-shift QPSK receiver for TDAMA/TDD systems
377
A /spl pi//4-shift QPSK receiver for TDMA/TDD systems
378
A /spl pi/-shaped ultrasonic tweezers concept for manipulation of small particles
379
A /spl plusmn/1 volt very high frequency class AB CMOS active inductor
380
A /spl plusmn/2.45 V-swing CMOS telescopic operational amplifier
381
A /spl plusmn/30% tuning range varactor compatible with future scaled technologies
382
A /spl Sigma/ /spl Delta/-FIR-DAC for Multi-Bit /spl Sigma/ /spl Delta/ Modulators
383
A /spl Sigma/-/spl Delta/ fractional-N frequency synthesizer using a wideband integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications
384
A /spl theta/-method for eddy currents in time-domain with a discrete geometric approach
385
A /sup 13/C/sub 2/H/sub 2/ frequency-stabilized, polarization-maintained 1.54 /spl mu/m erbium fiber ring laser with a new feedback system
386
A :) Is Worth a Thousand Words: How People Attach Sentiment to Emoticons and Words in Tweets
387
A ?0.5V-input voltage booster circuit for on-chip solar cells in 0.18?m CMOS technology
388
A ?30 dBm sensitive ultra low power RF energy harvesting front end with an efficiency of 70.1% at ?22 dBm
389
A ?NMR CMOS transceiver using a butterfly-coil input for integration with a digital microfluidic device inside a portable magnet
390
A [10°C; 70°C] 640×480 17µm pixel pitch TEC-less IR bolometer imager with below 50mK and below 4V power supply
391
A [55,16,19] binary Goppa code (Corresp.)
392
A [55,16,19] binary Goppa code and related codes having large minimum distance
393
A [72,36,16] doubly even code does not have an automorphism of order 11 (Corresp.)
394
A ``Critical´´ Tracking Task for Manual Control Research
395
A ``New´´ Crosslinking Process for Extruded Dielectric Cable
396
A `basis trajectory´ approach to the inverse dynamics formulation of robot manipulators
397
A `Bottom-up´ Redefinition for Mobility and the Effect of Poor Tube-Tube Contact on the Performance of CNT Nanobundle Thin Film Transistors
398
A `conservative´ approach to parallelizing the Sharks World simulation
399
A `digital´ 6-bit ADC in 0.25 μm CMOS
400
A `fragmented´ restoration scheme for flat network architectures
401
A `free´ 3-dB cross-polarized SAR data
402
A `gammachirp´ function as an optimal auditory filter with the Mellin transform
403
A `greedy´ approach to the write problem in shadowed disk systems
404
A `hands-on´ or `hands-off´ approach in electricity distribution; outsourcing of business processes in a HRM perspective
405
A `Helmholz´ large loop antenna system for improved magnetic field measurements
406
A `hi-lo Markov chain model for multimedia traffic in ATM networks
407
A `Jacobi´ signal processing unit for time-adaptive SVD
408
A `liub(log2(N))-2´ resilient decentralized commit protocol
409
A `local field error problem´ approach for error estimation in finite element analysis
410
A `Microwave Eye´ Can be Almost Human
411
A `missing neighbor model´ for capacitive loading in VLSI interconnect channels
412
A `natural´ decomposition of multi-level relations
413
A `neural´ A/D converter utilizing Schmitt trigger
414
A `new´ security policy model
415
A `propagative´ approach to sensitivity analysis
416
A `retraction´ method for learned navigation in unknown terrains for a circular robot
417
A `retraction´ method for terrain model acquisition
418
A `sidewinding´ locomotion gait for hyper-redundant robots
419
A `surrogate problem´ approach for lot size optimization in manufacturing systems
420
A `systolic array´ formulation of the optimal bounding ellipsoid algorithm
421
A `three step´ refinement process for automatic 2-D mesh adaption
422
A `three transfer functions´ approach for the standstill frequency response test of synchronous machines
423
A `true´ TMN network management system for large-scale transport network using a distributed object environment
424
A `two degrees of freedom´ approach for parallel programming
425
A `virtual body´ model for surgical education and rehearsal
426
A `virtual waferscale´ multichip module system
427
A `zero´ ripple technique applicable to any DC converter
428
A {0, 1} linear program for fixed-profile load scheduling and demand management in automated irrigation channels
429
A ´best´ mismatched filter response for radar clutter discrimination
430
A ´Controls Workflow Management´ HMI To Configure and Maintain An Event Based Control System
431
A ´crystal ball´ for software liability
432
A ´delayed layering´ three layer channel routing
433
A ´do-it-yourself´ methodology for CMOS transistor mismatch characterization
434
A ´hands-on´ or ´hands-off´ approach in electricity distribution; outsourcing.of business processes in a hrm perspective
435
A ´new approach to punching´
436
A ´non-model building´ approach to solving hierarchical functions
437
A ´Notion´ for interactive behavioral animation control
438
A ´paired approach´ procedure for closely spaced parallel runways: issues and simulation results
439
A ´Personalized´ Facial Expression Recognition System using Case Based Reasoning
440
A ´personalized´ facial expression recognition with fuzzy similarity measure and novel feature selection method
441
A ´profession´ that forces wives to work
442
A ´quantized´ channel approach to blind equalization
443
A ´room´ with a$ ´view´
444
A ´self-aligned´ selective MBE technology for high-performance bipolar transistors
445
A ´Staff Infection´ The Military Workaholic
446
A ´Textbook´ Computerized State-Space Network Analysis Algorithm
447
A ´trick´ for the design of FIR half-band filters
448
A ´unique´ guide to pultrusion technology
449
A +0.4°C accurate high-speed remote junction temperature sensor with digital Beta correction and series-resistance cancellation in 65nm CMOS
450
A +100dB gain, rail-to-rail output, low distortion, low noise amplifier in BiCMOS technology
451
A +10-dBm IIP3 SiGe mixer with IM3 cancellation technique
452
A +110dBm IIP3 SiGe mixer with IM3 cancellation technique
453
A +18 dBm broadband CMOS power amplifier RFIC with distortion cancellation
454
A +18 dBm IIP3 LNA in 0.35 /spl mu/m CMOS
455
A +18dBm, 79–87.5GHz bandwidth power amplifier in 0.13µm SiGe-BiCMOS
456
A +2.3dBm 124–158GHz Class-C frequency quadrupler with folded-transformer based multi-phase driving
457
A +2.4/0 V controlled high power GaAs SPDT antenna switch IC for GSM application
458
A +21.2 dBm out-of-band IIP3 0.2-3GHz RF front-end using impedance translation technique
459
A +22dBm IIP3 and 3.5dB NF wideband receiver with RF and baseband blocker filtering techniques
460
A +24 dBm Two Stage Hybrid Er Doped - Er/Yb Co-Doped Double Clad Fiber Amplifier for the C Band
461
A +30.5 dBm CMOS Doherty power amplifier with reliability enhancement technique
462
A +32.8 dBm LDMOS power amplifier for WLAN in 65 nm CMOS technology
463
A +5dBFS third-order extended dynamic range single-loop ΔΣ modulator
464
A +7.9dBm IIP3 LNA for CDMA2000 in a 90nm digital CMOS process
465
A +78 dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers
466
A +9-dBm Output P1db Active Feedback CMOS Wideband LNA for SAW-Less Receivers
467
A d-q model for the self-commutated synchronous machine considering the effects of magnetic saturation
468
A G-net model for knowledge representation and reasoning
469
A H∞ optimal theory-based generator control system
470
A H∞ based loop shaping method and μ-synthesis
471
A k shortest path algorithm for adaptive routing in communications networks
472
A Kα-band instrumentation radar with one foot range resolution
473
A K/Ka-band distributed power amplifier with capacitive drain coupling
474
A K-band oscillator locked to the first water resonance
475
A k-nearest neighbor artificial neural network classifier
476
A k-step predictive scheme for speed control of diesel driven power plants
477
A k-step predictive scheme for speed control of diesel driven power-plants
478
A O(√N) time sorting algorithm for the mesh connected architecture
479
A Q-band monolithic balance resistive HEMT mixer using CPW/slotline balun
480
A T1 ones-density controller based on finite-state machines
481
A V-band wafer probe using ridge-trough waveguide
482
A W-band image-rejection downconverter
483
A W-band monolithic downconverter
484
A W-matrix methodology for solving sparse network equations on multiprocessor computers
485
A Z-pinch neonlike X-ray laser
486
A Z-transform analysis of uniform and nonuniform RC -lines
487
A Z-transform model of transformers for the study of electromagnetic transients in power systems
488
A mux-based High-Performance Single-Cycle CMOS Comparator
489
A NAND Flash Memory Controller for SD/MMC Flash Memory Card
490
A W-Band Polarization Converter and Isolator
491
A \\Delta \\Sigma Interface for MEMS Accelerometers Using Electrostatic Spring Constant Modulation for Cancellation of Bondwire Capacitance Drift
492
A di/dt Compensation Technique in Delay Testing by Disconnecting Power Pins
493
A Ku -Band High- Q Tunable Filter With Stable Tuning Response
494
A Ku -Band Two-Antenna Four-Simultaneous Beams SiGe BiCMOS Phased Array Receiver
495
A \\hbox {2}\\times\\hbox {2} Optofluidic Multimode Interference Coupler
496
A {N} \\times {N} Architecture for 2-D Mirror-Type Optical Switches
497
A {\\rm Z} -Axis Quartz Tuning Fork Micromachined Gyroscope Based on Shear Stress Detection
498
A {bm \\lambda } -Cut and Goal-Programming-Based Algorithm for Fuzzy-Linear Multiple-Objective Bilevel Optimization
499
A \\hbox {Pb}(\\hbox {Zr}_{0.55}\\hbox {Ti}_{0.45}) \\hbox {O}_{3} -Transduced Fully Differential Mechanically Coupled Frequency Agile Filter
500
A 1/2 \\times {\\hbox {VDD}} to 3 \\times {\\hbox {VDD}} Bidirectional I/O Buffer With a Dy
501
A \\hbox {Gb/s}+ Slew-Rate/Impedance-Controlled Output Driver With Single-Cycle Compensation Time
502
A 2\\times V_{\\rm DD} -Enabled Mobile-TV RF Front-End With TV-GSM Interoperability in 1-V 90-nm CMOS
503
A {\\rm Zn}^{2+} Optical Sensor and Logic Actuator Using Schiff Base Functionalized Mesoporous Material
504
A {\\hbox {700-}}\\mu{\\hbox {A}} 405-MHz All-Digital Fractional- N Frequency-Locked Loop for
505
A {\\hbox {70}}{\\hbox {\\textendash }} {\\hbox {78-}}{\\hbox {GHz}} Integrated CMOS Frequency Synthesizer for
506
A 160~\\mu {\\rm W} 8-Channel Active Electrode System for EEG Monitoring
507
A {0.35}~\\mu{\\rm m} Sub-ns Wake-up Time ON-OFF Switchable LVDS Driver-Receiver Chip I/O Pad Pair for Rate-Dependent Power Saving in AER Bit-Serial Links
508
A {\\rm TM}_{11} Dual-Mode Dielectric Resonator Filter With Planar Coupling Configuration
509
A 0.13~\\mu{\\rm m} CMOS Operational Schmitt Trigger R-to-F Converter for Nanogap-Based Nanosensors Read-Out
510
A 1 \\times N Lossless Adaptive Optical Power Splitter Employing an Opto-VLSI Processor
511
A {\\rm TM}_{01} Mode Monoblock Dielectric Filter
512
A 780 \\times 800~{\\mu}\\hbox {m}^2 Multichannel Digital Silicon Photomultiplier With Column-Parallel Time-to-Digital Converter and Basic Characterization
513
A 148fs_{\\rms} Integrated Noise 4 MHz Bandwidth Second-Order \\Delta \\Sigma Time-to-Digita
514
A 1.5\\pm 0.39~{\\rm p\\pm}/^{\\circ}{\\rm C} Temperature-Compensated LC Oscillator Using Constant-Biased Varactors
515
A Q – f Droop Curve for Facilitating Islanding Detection of Inverter-Based Distributed Ge
516
A Q -Band Four-Element Phased-Array Front-End Receiver With Integrated Wilkinson Power Combiners in 0.18- \\</a></div> <div class='valueDiv recordListRow'><div class='rowCountCircle'>517</div><a href='49/1518750.htm'>A <formula formulatype= Q -Band Injection-Locked Frequency Divider With Inductive Feedback for a Locking Range Enhancement
518
A Q -Factor Enhanced Optoelectronic Oscillator for 40-Gbit/s Pulsed RZ-OOK Transmission
519
A Q -Learning Approach to Derive Optimal Consumption and Investment Strategies
520
A Q -Modification Neuroadaptive Control Architecture for Discrete-Time Systems
521
A \\mu W Complementary Bridge Rectifier With Near Zero Turn-on Voltage in SOS CMOS for Wireless Power Supplies
522
A V_O -Hopping Reconfigurable RGB LED Driver With Automatic \\Delta V_O Detection and Predic
523
A D -Band CMOS Transmitter With IF-Envelope Feed-Forward Pre-Distortion and Injection-Locked Frequency-Tripling Synthesizer
524
A C -Band InAs/InP Quantum Dot Semiconductor Mode-Locked Laser Emitting 403-GHz Repetition Rate Pulses
525
A z -Vertex Trigger for Belle II
526
A \\beta - \\hbox {Ga}_{2} \\hbox {O} _{3} Solar-Blind Photodetector Prepared by Furnace Oxidi
527
A \\beta - {\\rm Ga}_{2} {\\rm O} _{3} /GaN Hetero-Structured Solar-Blind and Visible-Blind Dua
528
A \\beta -Ga _{2} O _{3}
529
A q -Domain Characteristic-Based Bit-Rate Model for Video Transmission
530
A q -Parameterized Deterministic Annealing EM Algorithm Based on Nonextensive Statistical Mechanics
531
A V -Band Divide-by-4 Direct Injection-Locked Frequency Divider in 0.18- \\mu{\\hbox {m}} CMOS
532
A V -Band Switched Beam-Forming Antenna Module Using Absorptive Switch Integrated With 4 ,\\times,
533
A X -Band Capacitor-Coupled QVCO Using Sinusoidal Current Bias Technique
534
A p -Adaptive Scheme for Scalar Fields, Using High-Order, Singular Finite Elements
535
A W -band High LO-to-RF Isolation Triple Cascode Mixer With Wide IF Bandwidth
536
A W -Band Micromachined 3-D Cavity-Backed Patch Antenna Array With Integrated Diode Detector
537
A W -Band Monolithic Integrated Active Hot and Cold Noise Source
538
A W -Band On-Wafer Active Load–Pull System Based on Down-Conversion Techniques
539
A W -Band Photonic Transmitter/Mixer Based on High-Power Near-Ballistic Uni-Traveling-Carrier Photodiode (NBUTC-PD)
540
A W -Band Photonic Transmitter-Mixer Based on High-Power Near-Ballistic Uni-Traveling-Carrier Photodiodes for BPSK and QPSK Data Transmission Under Bias Modulation
541
A \\Delta \\Sigma Fractional-N Synthesizer With Customized Noise Shaping for WCDMA/HSDPA Applications
542
A \\Delta \\Sigma -Digitized Polar RF Transmitter
543
A + 31.5 dBm CMOS RF Doherty Power Amplifier for Wireless Communications
544
A K -Band CMOS Distributed Doubler With Current-Reuse Technique
545
A K -Band CMOS UWB Radar Transmitter With a Bi-Phase Modulating Pulsed Oscillator
546
A K -Band Divide-by-Five Injection-Locked Frequency Divider Using a Near-Threshold VCO
547
A K -Band Planar Active Integrated Bi-Directional Switching Heat Applicator With Uniform Heating Profile
548
A Ka -Band E -Plane Waveguide Magic-T With Coplanar Arms
549
A Ka -Band Fully Tunable Cavity Filter
550
A Ka -Band High-Gain Circularly Polarized Microstrip Antenna Array
551
A Ka -Band Monolithic Bidirectional Up-Down Converter for High-Speed Applications
552
A G -Band Four-Element Butler Matrix in 0.13 µm SiGe BiCMOS Technology
553
A \\mu -Rhythm Matched Filter for Continuous Control of a Brain-Computer Interface
554
A t -Norm-Based Fuzzy Approach to the Estimation of Measurement Uncertainty
555
A \\hbox {TiO}_{2} Nanowire MIS Photodetector With Polymer Insulator
556
A \\hbox {TiSi}_{2}/\\hbox {Si} Heteronanocrystal Memory Operated With Hot Carrier Injections
557
A \\hbox {Nb}_{3}\\hbox {Sn} -Based, Model Superconducting Helical Undulator Fabricated Using a Wind and React Process
558
A \\lambda /4 -Shifted Distributed-Feedback Laser Diode With a Fiber Ring Cavity Configuration Having an OSNR of 85 dB and a Linewidth of 7 kHz
559
A \\Delta {-}\\Sigma PLL-Based Spread-Spectrum Clock Generator With a Ditherless Fractional Topology
560
A \\pm 0.5% Precision On-Chip Frequency Reference With Programmable Switch Array for Crystal-Less Applications
561
A \\pm 0.75-V Compact CMOS Class-AB Current-Mode Exponential Variable Gain Amplifier
562
A Ka -Band FMCW Radar Front-End With Adaptive Leakage Cancellation
563
A \\Delta \\Sigma -TDC-Based Beamforming Method for Vital Sign Detection Radar Systems
564
A g_{m}/I_{D} -Based Noise Optimization for CMOS Folded-Cascode Operational Amplifier
565
A \\mu -Controller-Based System for Interfacing Selectorless RRAM Crossbar Arrays
566
A (10 \\times 10) -Gb/s DFB-LD Array Integrated With PLC-Based AWG for 100-Gb/s Transmission
567
A \\mu m-Scale Computational Model of Magnetic Neural Stimulation in Multifascicular Peripheral Nerves
568
A 4 \\times 4 Dual Polarized mm-Wave ACMPA Array for a Universal mm-Wave Chipless RFID Tag Reader
569
A \\alpha -Si:H Thin-Film Phototransistor for a Near-Infrared Touch Sensor
570
A 2\\times (4)\\times 128 Multitime-Gated SPAD Line Detector for Pulsed Raman Spectroscopy
571
A 1\\times 8 Splitter Chip With Integrated Fiber Grooves for Reliable Passive Alignment of Fiber Arrays
572
A 24,\\mu text{W} , Batteryless, Crystal-free, Multinode Synchronized SoC “Bionode” for Wireless Prosthesis Control
573
A 0.7;text{V};24;up\\mutext{A} Hybrid OTA Driving 15 nF Capacitive Load With 1.46 MHz GBW
574
A R-P learning applied to a network model of cortical area 7a
575
A 13C2H2 frequency-stabilized λ/4-shifted DFB laser diode with an external fiber ring cavity having a linewidth of 2.6 kHz and a RIN of −135 dB/Hz
576
A 19F MR Technique For Drug-specific Imaging Of The Cytostatic Agent 5-fluorouracil
577
A 252Cf neutron irradiator for testing electronic components for the Large Hadron Collider
578
A 252Cf time-of-flight system for SEU testing
579
A 68Ge PET hot-sphere phantom with no cold shells
580
A 85Rb coherent population trapping atomic clock
581
A >0mW SSPA from 76-94GHz, with Peak 28.9% PAE at 86GHz
582
A >25% PAE 0.2-6 GHz lumped power amplifier in a 18 GHz MESFET technology
583
A >400 GHz fmax transferred-substrate HBT integrated circuit technology
584
A 0 dB-IL, 2140/spl plusmn/30 MHz bandpass filter utilizing Q-enhanced spiral inductors in standard CMOS
585
A 0 dBm IIP3, 23.5 dB Gain,1.9 dB NF, ESD Protected Wideband Programmable LNA for Multi-band Navigation Receiver Front-End
586
A 0–1 control mechanism with partial information for periodic tumour motion classification
587
A 0–1 integer LP formulation for real time optimization of traffic signal control
588
A 0–1 linear programming formulation for the Berth Assignment Problem
589
A 0–1 program to form minimum cost clusters in the downlink of cooperating base stations
590
A 0–10GHz SP16T MEMS switch for switched beam satellite antenna systems
591
A 0–35dB wideband variable gain amplifier in 0.13μm CMOS
592
A 0–55-GHz Coplanar Waveguide to Coplanar Strip Transition
593
A 0–900° low-loss miniaturized reflective-type CMOS phase shifter using Active inductors
594
A 0(1) Time Deadlock Detection Scheme in a Single Unit and Single Request Multiprocessor System
595
A 0.001 Per Cent Hall-Effect Probe
596
A 0.001mm2 100µW on-chip temperature sensor with ±1.95 °C (3σ) Inaccuracy in 32nm SOI CMOS
597
A 0.0025mm2 bandgap voltage reference for 1.1V supply in standard 0.16μm CMOS
598
A 0.0027-mm2 9.5-bit 50-MS/s all-digital A/D converter TAD in 65-nm digital CMOS
599
A 0.002-mm ^{2} 6.4-mW 10-Gb/s Full-Rate Direct DFE Receiver With 59.6% Horizontal Eye Opening Under 23.3-dB Channel Loss at Nyquist Frequency
600
A 0.003 mm ^{2} 10 b 240 MS/s 0.7 mW SAR ADC in 28 nm CMOS With Digital Error Correction and Correlated-Reversed Switching
601
A 0.0045- \\hbox {mm}^{2} 32.4- \\mu\\hbox {W} Two-Stage Amplifier for pF-to-nF Load Using CM Frequency
602
A 0.004mm/sup 2/ Portable Multiphase Clock Generator Tile for 1.2GHz RISC Microprocessor
603
A 0.004-mm ^{2} Portable Multiphase Clock Generator Tile for 1.2-GHz RISC Microprocessor
604
A 0.004mm2 250μW ΔΣ TDC with time-difference accumulator and a 0.012mm2 2.5mW bang-bang digital PLL using PRNG for low-power SoC applications
605
A 0.004mm2 single-channel 6-bit 1.25GS/s SAR ADC in 40nm CMOS
606
A 0.0058mm2 7.0 ENOB 24MS/s 17fJ/conv. threshold configuring SAR ADC with source voltage shifting and interpolation technique
607
A 0.007-mm2 108- {\\rm p\\pm}/^{\\circ } {\\rm C} 1-MHz Relaxation Oscillator for High-Temperature Applications up to 180 {\\hbox {mm}}^{2} 500 /spl mu/W 469 kS/s Frequency-to-Digital Converter Based CMOS Temperature Sensor With Process Variation Compensation
609
A 0.008-mm2 area-optimized thermal-diffusivity-based temperature sensor in 160-nm CMOS for SoC thermal monitoring
610
A 0.009–1.4-GHz Frequency Synthesizer With Suppressed Transients During VCO Band Switching
611
A 0.01 mm2 fully-differential 2-stage amplifier with reference-free CMFB using an architecture-switching-scheme for bandwidth variation
612
A 0.01% linear instrumentation amplifier
613
A 0.01%THD, 70dB PSRR Single Ended Class D using variable hysteresis control for headphone amplifiers
614
A 0.01–8-GHz (12.5 Gb/s) 4 ,\\times, 4 CMOS Switch Matrix
615
A 0.010mm2 9.92psrms low tracking jitter pixel clock generator with a divider initializer and a nearest phase selector in 28nm CMOS technology
616
A 0.011 mm2 PVT-robust fully-synthesizable CDR with a data rate of 10.05 Gb/s in 28nm FD SOI
617
A 0.01-18 GHz Wide Dynamic Range Precision Vector Ratio Meter
618
A 0.013 {\\hbox {mm}}^{2} , 5 \\mu\\hbox {W} , DC-Coupled Neural Signal Acquisition IC With 0
619
A 0.013mm2 5μW DC-coupled neural signal acquisition IC with 0.5V supply
620
A 0.014mm2 9b switched-current DAC for AMOLED mobile display drivers
621
A 0.015-mm2 60-GHz reconfigurable wake-up receiver by reusing multi-stage LNAs
622
A 0.015mm2 63fJ/conversion-step 10-bit 220MS/s SAR ADC with 1.5b/step redundancy and digital metastability correction
623
A 0.016 mm ^{2} , 2.4 GHz RF Signal Quality Measurement Macro for RF Test and Diagnosis
624
A 0.016-mm ^{2} 144- \\mu W Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load Wi
625
A 0.016mm2 144μW three-stage amplifier capable of driving 1-to-15nF capacitive load with >0.95MHz GBW
626
A 0.016mm2, 2.4GHz RF signal quality measurement macro for RF test and diagnosis
627
A 0.018% THD+N, 88-dB PSRR PWM Class-D Amplifier for Direct Battery Hookup
628
A 0.02 mm ^{2} 59.2 dB SFDR 4th-Order SC LPF With 0.5-to-10 MHz Bandwidth Scalability Exploiting a Recycling SC-Buffer Biquad
629
A 0.02 nJ self-calibrated 65nm CMOS delay line temperature sensor
630
A 0.021 µm2 trigate SRAM cell with aggressively scaled gate and contact pitch
631
A 0.022 mm ^{{2}} 98.5 dB SNDR Hybrid Audio \\Delta \\Sigma Modulator With Digital ELD Compe
632
A 0.022mm2 970µW dual-loop injection-locked PLL with −243dB FOM using synthesizable all-digital PVT calibration circuits
633
A 0.022mm2 98.5dB SNDR hybrid audio delta-sigma modulator with digital ELD compensation in 28nm CMOS
634
A 0.024 mm2 4.9 fJ 10-bit 2 MS/s SAR ADC in 65 nm CMOS
635
A 0.024mm2 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS
636
A 0.025–0.45 W 60%-Efficiency Inductive-Coupling Power Transceiver With 5-Bit Dual-Frequency Feedforward Control for Non-Contact Memory Cards
637
A 0.026mm2 5.3mW 32-to-2000MHz digital fractional-N phase locked-loop using a phase-interpolating phase-to-digital converter
638
A 0.026mm2 capacitance-to-digital converter for biotelemetry applications using a charge redistribution technique
639
A 0.028% THD+N, 91% power-efficiency, 3-level PWM Class-D amplifier with a true differential front-end
640
A 0.02-mm ^{2} 9-Bit 50-MS/s Cyclic ADC in 90-nm Digital CMOS Technology
641
A 0.02mm2 65nm CMOS 30MHz BW all-digital differential VCO-based ADC with 64dB SNDR
642
A 0.02mm2 embedded temperature sensor with ±2°C inaccuracy for self-refresh control in 25nm mobile DRAM
643
A 0.02-to-6GHz SDR balun-LNA using a triple-stage inverter-based amplifier
644
A 0.032mm2 3.1mW synthesized pixel clock generator with 30psrms integrated jitter and 10-to-630MHz DCO tuning range
645
A 0.039 mm ^2 Inverter-Based 1.82 mW 68.6 ~ dB-SNDR 10 MHz-BW CT-
646
A 0.039mm2 inverter-based 1.82mW 68.6dB-SNDR 10MHz-BW CT-ΣΔ-ADC in 65nm CMOS
647
A 0.039um2 high performance eDRAM cell based on 32nm High-K/Metal SOI technology
648
A 0.03mm/sup 2/ 9mW Wide-Range Duty-CycleCorrecting False-Lock-Free DLL with Fully Balanced Charge-Pump for DDR Interface
649
A 0.03mm2 highly balanced balun IC for millimeter-wave applications in 180-nm CMOS
650
A 0.03mm2, 40nm CMOS 1.5GS/s all-digital complementary PWM-GRO
651
A 0.04 cc Power Amplifier Module with Fully Integrated Passives in a Hybrid LTCC Substrate for 5-GHz Wireless LANs
652
A 0.042-mm2 fully integrated analog PLL with stacked capacitor-inductor in 45nm CMOS
653
A 0.045mm2 0.1–6GHz reconfigurable multi-band, multi-gain LNA for SDR
654
A 0.04-mm2 0.9-mW 71-dB SNDR distributed modular AS ADC with VCO-based integrator and digital DAC calibration
655
A 0.05 /spl mu/m-CMOS with ultra shallow source/drain junctions fabricated by 5 keV ion implantation and rapid thermal annealing
656
A 0.05 cc Power Amplifier Module with a Novel Low Impedance Matching Technique for 900 MHz Personal Digital Cellular Phone
657
A 0.05-26 GHz Direct Conversion I/Q Modulator MMIC
658
A 0.059-mm2 10.8-mW local oscillator for GSM systems in 65-nm CMOS
659
A 0.05Ã\x970.05mm2 RFID Chip with Easily Scaled-Down ID-Memory
660
A 0.05mm2 0.6V 500kS/s 14.3fJ/conversion-step 11-bit two-step switching SAR ADC for 3-dimensional stacking CMOS imager
661
A 0.05-mm2 110-μW 10-b self-calibrating successive approximation ADC core in 0.18-μm CMOS
662
A 0.05pJ/p-mV 5th-derivative pulse generator for full-band IR-UWB transceiver in 0.18µm CMOS
663
A 0.05-to-10GHz 19-to-22GHz and 38-to-44GHz SDR frequency synthesizer in 0.13μm CMOS
664
A 0.06 mm ^{2} 11 mW Local Oscillator for the GSM Standard in 65 nm CMOS
665
A 0.06 mm2 6 dBm IB1db wideband CMOS class-AB LNTA for SAW-less applications
666
A 0.063 µm2 FinFET SRAM cell demonstration with conventional lithography using a novel integration scheme with aggressively scaled fin and gate pitch
667
A 0.06mm2 14nV/√Hz chopper instrumentation amplifier with automatic differential-pair matching
668
A 0.06mm2 8.9b ENOB 40MS/s pipelined SAR ADC in 65nm CMOS
669
A 0.06-mm2 double-sampling single-OTA 2nd-order ΔΣ modulator in 0.18-μm CMOS technology
670
A 0.06-psRMS SSC-induced jitter, ΔΣ-dithering-free, 6-GHz spread-spectrum clock generator for serial-ATA generation
671
A 0.07 mm ^2 Asynchronous Logic CMOS Pulsed Receiver Based on Radio Events Self-Synchronization
672
A 0.07 mm ^{2} 2.2 mW 10 GHz Current-Reuse Class-B/C Hybrid VCO Achieving 196-dBc/Hz FoM _{{\\rm A}}
673
A 0.073-mm2 10-GS/s 6-bit time-domain folding ADC in 65-nm CMOS with inherent DEM
674
A 0.076mm2 3.5GHz spread-spectrum clock generator with memoryless Newton-Raphson modulation profile in 0.13μm CMOS
675
A 0.077 to 0.168 nJ/bit/iteration scalable 3GPP LTE turbo decoder with an adaptive sub-block parallel scheme and an embedded DVFS engine
676
A 0.08 /spl mu/m/sup 2/-sized 8F/sup 2/ stack DRAM cell for multi-gigabit DRAM
677
A 0.08 mm2, 7mW Time-Encoding Oversampling Converter with 10 bits and 20MHz BW in 65nm CMOS
678
A 0.08–3GHz high gain UWB LNA with improved flatness
679
A 0.084 nJ/b FSK transmitter and 4.8 μW OOK receiver for ISM-band medical sensor networks
680
A 0.08-cc fully integrated LTCC transceiver front-end module for 5-GHz wireless LAN systems
681
A 0.09 \\mu W Low Power Front-End Biopotential Amplifier for Biosignal Recording
682
A 0.094um2 high density and aging resilient 8T SRAM with 14nm FinFET technology featuring 560mV VMIN with read and write assist
683
A 0.1 - 50 GHz SiGe HBT distributed amplifier employing constant-k m-derived sections
684
A 0.1 μm inverted-sidewall recessed-channel (ISRC) nMOSFET for high performance and reliability
685
A 0.1 /spl mu/m CMOS technology with tilt-implanted punchthrough stopper (TIPS)
686
A 0.1 /spl mu/m CMOS with a step channel profile formed by ultra high vacuum CVD and in-situ doped ions
687
A 0.1 /spl mu/m GaAs MESFET technology for ultra-high-speed digital and analog IC
688
A 0.1 /spl mu/m IHLATI (indium halo by large angle tilt implant) nMOSFET for 1.0 V low power application
689
A 0.1 /spl mu/m W-band HEMT production process for high yield and high performance low noise and power MMICs
690
A 0.1 Megapixel THz camera with 17 degree field of view for large area single shot imaging
691
A 0.1 Microsecond, 2,000 Channel, Electrostatic Storage System for Use as a Time of Flight Analyzer
692
A 0.1 mm ^{2} , Wide Bandwidth Continuous-Time \\Sigma \\Delta ADC Based on a Time Encoding Qu
693
A 0.1 mu m-gate elevated source and drain MOSFET fabricated by phase-shifted lithography
694
A 0.1 ppm Successive Approximation Frequency-Temperature Compensation Method for Temperature Compensated Crystal Oscillators (TCXO)
695
A 0.1 to 10 MHz Dielectric Specimen Bridge with Dissipation Factor Accuracy of ±10-6
696
A 0.1 to 25 GHz HMIC Distributed Amplifier on AL203 Substrate
697
A 0.1 TO 50 GHz Automatic Netowrk Analyzer
698
A 0.1 TW gas-breakdown plasma-anode ion diode
699
A 0.1% accuracy 100Ω-20MΩ dynamic range integrated gas sensor interface circuit with 13+4 bit digital output
700
A 0.1-μm 1.8-V 256-Mb Phase-Change Random Access Memory (PRAM) With 66-MHz Synchronous Burst-Read Operation
701
A 0.1°/HR bias drift electronically matched tuning fork microgyroscope
702
A 0.1–0.3 V 40–123 fJ/bit/ch On-Chip Data Link With ISI-Suppressed Bootstrapped Repeaters
703
A 0.1–1.2 GHz CMOS ultra-broadband power amplifier
704
A 0.1–1.5 GHz 8-bit Inverter-Based Digital-to-Phase Converter Using Harmonic Rejection
705
A 0.1–1.5 GHz all-digital phase inversion delay-locked loop
706
A 0.1–1.5 GHz Harmonic Rejection Receiver Front-End With Phase Ambiguity Correction, Vector Gain Calibration and Blocker-Resilient TIA
707
A 0.1–1.5GHz dual-mode Class-AB/Class-F power amplifier in 65nm CMOS
708
A 0.1–1.5GHz harmonic rejection receiver front-end with hybrid 8 phase LO generator, phase ambiguity correction and vector gain calibration
709
A 0.1–2 GHz CMOS RF front-end for Software-Defined Radio applications
710
A 0.1–20 GHz Low-Power Self-Biased Resistive-Feedback LNA in 90 nm Digital CMOS
711
A 0.1–3 GHz low power cascode CS LNA using 0.18µm CMOS technology
712
A 0.1–3GHz cell-based fractional-N all digital phase-locked loop using ΔΣ noise-shaped phase detector
713
A 0.1–4GHz resistive feedback LNA with feedforward noise and distortion cancelation
714
A 0.1–5 GHz Cryogenic SiGe MMIC LNA
715
A 0.1–5.0 GHz Reconfigurable Transmitter With Dual-Mode Power Amplifier and Digitally-Assisted Self-Calibration for Private Network Communications
716
A 0.1–5.0GHz self-calibrated SDR transmitter with −62.6dBc CIM3 in 65nm CMOS
717
A 0.1–5GHz Dual-VCO software-defined ∑Δ frequency synthesizer in 45nm digital CMOS
718
A 0.1–5GHz flexible SDR receiver in 65nm CMOS
719
A 0.1–5GHz SDR transmitter with dual-mode power amplifier and digital-assisted I/Q imbalance calibration in 65nm CMOS
720
A 0.1–6 GHz inductorless differential common gate LNA
721
A 0.1–6.0-GHz Dual-Path SDR Transmitter Supporting Intraband Carrier Aggregation in 65-nm CMOS
722
A 0.1–8.5 GHz wideband CMOS LNA using forward body bias technology for SDR applications
723
A 0.1∼4GHz receiver and 0.1∼6GHz transmitter with reconfigurable 10∼100MHz signal bandwidth in 65nm CMOS
724
A 0.1-μA standby current, ground-bounce-immune 1-Mbit CMOS SRAM
725
A 0.1-μm delta-doped MOSFET fabricated with post-low-energy implanting selective epitaxy
726
A 0.1-μm gate Al0.5In0.5As/Ga0.5In0.5As MODFET fabricated on GaAs substrates
727
A 0.1/spl mu/A standby current, bouncing-noise-immune 1Mb SRAM
728
A 0.1/spl mu/m 1.8V 256Mb 66MHz Synchronous Burst PRAM
729
A 0.1-/spl mu/m double-deck-shaped gate HJFET with reduced gate-fringing-capacitance for ultra-high-speed ICs
730
A 0.1-/spl mu/m self-aligned-gate GaAs MESFET with multilayer interconnection structure for ultra-high-speed ICs
731
A 0.10 μm NMOS transistor with Heavy Ion Implanted Pockets (HIIP)
732
A 0.10 μm CMOS, 1.2 V, 2 GHz phase-locked loop with gain compensation VCO
733
A 0.10 /spl mu/m gate length CMOS technology with 30 /spl Aring/ gate dielectric for 1.0 V-1.5 V applications
734
A 0.10-/spl mu/m CMOS device with a 40-nm gate sidewall and multilevel interconnects for system LSI
735
A 0.11 μm CMOS clocked comparator for high-speed serial communications
736
A 0.11 μm DRAM technology for 4Gb DRAM and beyond
737
A 0.11 /spl mu/m CMOS technology with copper and very-low-k interconnects for high-performance system-on-a-chip cores
738
A 0.1-1.5 GHz 8-bit inverter-based digital-to-phase converter using harmonic rejection
739
A 0.1-1.7 GHz, 1.1dB NF low noise amplifier for radioastronomy application
740
A 0.1-1.8 GHz, 100 W GaN HEMT Power Amplifier Module
741
A 0.1-12 GHz fully differential CMOS distributed amplifier employing a feedforward distortion cancellation technique
742
A 0.1-14 GHz wideband SiGe BiFET power amplifier
743
A 0.114-mW dual-conduction class-C CMOS VCO with 0.2-V power supply
744
A 0.115 /spl mu/m/sup 2/ 8F/sup 2/ DRAM working cell with LPRD (low parasitic resistance device) and poly metal gate technology for gigabit DRAM
745
A 0.11mm?2 150mW 10GBase-T transmitter in 28nm CMOS process
746
A 0.11mm2 low-power A/D-converter cell for 10b 10MS/s operation
747
A 0.11mm2, 5.7-to-6.7GHz, parametrically pumped quadrature LC-VCO with digital outputs
748
A 0.12 μm CMOS DVB-T tuner
749
A 0.12 mm ^{2} 7.4 \\mu W Micropower Temperature Sensor With an Inaccuracy of
750
A 0.12μm CMOS Comparator Requiring 0.5V at 600MHz and 1.5V at 6GHz
751
A 0.12- {\\hbox {mm}}^{2} 2.4-GHz CMOS Inductorless High Isolation Subharmonic Mixer With Effective Current-Reuse Transconductance
752
A 0.123 mW 7.25 GHz static frequency divider by 8 in a 120-nm SOI technology
753
A 0.1-23-GHz SiGe BiCMOS analog multiplier and mixer based on attenuation-compensation technique
754
A 0.1-25.5-GHz Differential Cascaded-Distributed Amplifier in 0.18- μm CMOS Technology
755
A 0.127 μm2 High Performance 65nm SOI Based embedded DRAM for on-Processor Applications
756
A 0.127-mm2, 5.6-mW, 5th-order SC LPF with +23.5-dBm IIP3 and 1.5-to-15-MHz clock-defined bandwidth in 65-nm CMOS
757
A 0.12mm2 5Gbps receiver with a level shifting equalizer and a cumulative-histogram-based adaptation engine
758
A 0.12mm2 7.4μW micropower temperature sensor with an inaccuracy of ±0.2°C (3σ) from −30°C to 125°C
759
A 0.13- µm CMOS NOR flash memory experimental chip for 4-b/cell digital storage
760
A 0.13 μm Low-power Race-free Programmable Logic Array
761
A 0.13 µm 8 Mb Logic-Based Cu _{\\rm x} Si _{\\rm y} O ReRAM With Self-Adaptive Operation
762
A 0.13 µm CMOS laser radar receiver with leading edge detection and time domain error compensation
763
A 0.13 µm SiGe BiCMOS technology for mm-wave mixed-signal applications
764
A 0.13 μm CMOS 90 dB variable gain pre-power amplifier using robust linear-in-dB attenuator
765
A 0.13 μm CMOS stacked folded fully differential PA structure for W-CDMA Application
766
A 0.13 μm CMOS System-on-Chip for a 512 × 424 Time-of-Flight Image Sensor With Multi-Frequency Photo-Demodulation up to 130 MHz and 2 GS/s ADC
767
A 0.13 μm CMOS transmitter with 72-dB RF gain control for mobile WiMAX/WiBro applications
768
A 0.13 μm BiCMOS technology featuring a 200/280 GHz (fT/fmax) SiGe HBT
769
A 0.13 μm CMOS front-end for DCS1800/UMTS/802.11b-g with multi-band positive feedback low noise amplifier
770
A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier
771
A 0.13 μm CMOS serializer for data and trigger optical links in particle physics experiments
772
A 0.13 μm CMOS UWB transceiver
773
A 0.13 μm poly-SiGe gate CMOS technology for low-voltage mixed-signal applications
774
A 0.13 /spl mu/m 6 GHz 256/spl times/32b leakage-tolerant register file
775
A 0.13 /spl mu/m CMOS delay cell for 40 Gb/s FFE equalization
776
A 0.13 /spl mu/m CMOS platform with Cu/low-k interconnects for system on chip applications
777
A 0.13 /spl mu/m CMOS technology integrating high-speed and low-power/high-density devices with two different well/channel structures
778
A 0.13 /spl mu/m CMOS technology with 193 nm lithography and Cu/low-k for high performance applications
779
A 0.13 /spl mu/m DRAM technology for giga bit density stand-alone and embedded DRAMs
780
A 0.13 /spl mu/m full metal embedded DRAM technology targeting on 1.2 V, 450 MHz operation
781
A 0.13 /spl mu/m high-performance SOI logic technology with embedded DRAM for system-on-a-chip application
782
A 0.13 /spl mu/m logic-based embedded DRAM technology with electrical fuses, Cu interconnect in SiLK/sup TM/, sub-7 ns random access time and its extension to the 0.10 /spl mu/m generation
783
A 0.13 \\mu m CMOS Quad-Band GSM/GPRS/EDGE RF Transceiver Using a Low-Noise Fractional-N Frequency Synthesizer and Direct-Conversion A
784
A 0.13 \\mu{\\hbox {m}} SiGe BiCMOS Technology Featuring f _{T} /f \\mu{\\rm m} CMOS Low-Power Capacitor-Less LDO Regulator Using Bulk-Modulation Technique
841
A 0.13- \\mu m CMOS 6 Gb/s/pin Memory Transceiver Using Pseudo-Differential Signaling for Removing Common-Mode Noise Due to SSN
842
A 0.13- \\mu m CMOS Interface Circuit for a MEMS Resonator-Based Vacuum Measurement System
843
A 0.13- \\mu m CMOS Phase Shifter Using Tunable Positive/Negative Refractive Index Transmission Lines
844
A 0.13- \\mu{\\hbox {m}} 1-GS/s CMOS Discrete-Time FFT Processor for Ultra-Wideband OFDM Wireless Receivers
845
A 0.13- \\mu{\\hbox {m}} SiGe BiCMOS Colpitts-Based VCO for W -Band Radar Transmitters
846
A 0.13- \\mu m CMOS Current-Mode All-Pass Filter for Multi-GHz Operation
847
A 0.135 /spl mu/m/sup 2/ 6F/sup 2/ trench-sidewall vertical device cell for 4 Gb/16 Gb DRAM
848
A 0.137 mm ^{{2}} 9 GHz Hybrid Class-B/C QVCO With Output Buffering in 65 nm CMOS
849
A 0.13um CMOS Technology for Low-Voltage Analogue Applications
850
A 0.13um CMOS ultra-compact DVD SoC employing a full digital equalizing PRML read channel
851
A 0.13um double balanced mixer for 3.2-4.8GHz IR-UWB applications
852
A 0.14 pJ/b Inductive-Coupling Transceiver With Digitally-Controlled Precise Pulse Shaping
853
A 0.14- {\\hbox {mm}}^{2} 1.4-mW 59.4-dB-SFDR 2.4-GHz ZigBee/WPAN Receiver Exploiting a “Split-LNTA + 50% LO” Topology in 65-nm CMOS
854
A 0.14mW/Gbps high-density capacitive interface for 3D system integration
855
A 0.14pJ/b Inductive-Coupling Inter-Chip Data Transceiver with Digitally-Controlled Precise Pulse Shaping
856
A 0.15 – 4.98 GHz traveling-wave amplifier using packaged MESFET
857
A 0.15 μm/0.6 dB-NFmin RF BiCMOS technology using cobalt silicide ground shields
858
A 0.15 /spl mu/m CMOS foundry technology with 0.1 /spl mu/m devices for high performance applications
859
A 0.15 /spl mu/m DRAM technology node for 4 Gb DRAM
860
A 0.15 /spl mu/m KrF lithography for 1 Gb DRAM product using highly printable patterns and thin resist process
861
A 0.15 /spl mu/m logic based embedded DRAM technology featuring 0.425 /spl mu/m/sup 2/ stacked cell using MIM (metal-insulator-metal) capacitor
862
A 0.15 /spl mu/m NAND flash technology with 0.11 /spl mu/m/sup 2/ cell size for 1 Gbit flash memory
863
A 0.15- 12-GHz Matched Feedback Amplifier Using Commercially Available FET´s
864
A 0.15 mu m gate-length pseudomorphic HEMT
865
A 0.15 V Input Energy Harvesting Charge Pump With Dynamic Body Biasing and Adaptive Dead-Time for Efficiency Improvement
866
A 0.15-μm 60-GHz high-power composite channel GaInAs/InP HEMT with low gate current
867
A 0.15µm gate InAlN/GaN HEMT with thin barrier layer
868
A 0.15-/spl mu/m GaAs MHEMT transimpedance amplifier IC for 40-Gb/s applications
869
A 0.15-/spl mu/m/73-GHz f/sub max/ RF BiCMOS technology using cobalt silicide ring extrinsic-base structure
870
A 0.155, 0.622, and 2.488 Gb/s automatic bit rate selecting clock and data recovery IC for bit rate transparent SDH-systems
871
A 0.155-, 0.622-, and 2.488-Gb/s automatic bit-rate selecting clock and data recovery IC for bit-rate transparent SDH systems
872
A 0.15-mm-Thick Noncontact Connector for MIPI Using a Vertical Directional Coupler
873
A 0.15mm-thick non-contact connector for MIPI using vertical directional coupler
874
A 0.16 /spl mu/m modular BiCMOS (COM2-BiCMOS) technology for RF communication ICs
875
A 0.168μm2/0.11μm2 highly scalable high performance embedded DRAM cell for 90/65-nm logic applications
876
A 0.16mm2 completely on-chip switched-capacitor DC-DC converter using digital capacitance modulation for LDO replacement in 45nm CMOS
877
A 0.16mm2 12b 30MS/s 0.18?m CMOS SAR ADC based on low-power composite switching
878
A 0.16nJ/bit/iteration 3.38mm2 turbo decoder chip for WiMAX/LTE standards
879
A 0.16pJ/Conversion-Step 2.5mW 1.25GS/s 4b ADC in a 90nm Digital CMOS Process
880
A 0.17 /spl mu/m embedded DRAM technology with 0.23 /spl mu/m/sup 2/ cell size and advanced CMOS logic
881
A 0.17–1.4GHz low-jitter all digital DLL with TDC-based DCC using pulse width detection scheme
882
A 0.171-mW, 2.4-GHz Class-D VCO with dynamic supply voltage control
883
A 0.17-nJ/pulse IR-UWB receiver based on distributed pulse correlator in 0.18-µm digital CMOS
884
A 0.18 μm CMOS 8 GHz quadrature VCO for UWB application
885
A 0.18 μm CMOS Capacitive Detection Lab-on-Chip
886
A 0.18 μm CMOS Gaussian Monocycle Pulse Circuit Design for UWB
887
A 0.18 μm CMOS on-chip skin detection scheme based on NPNP-triple-junction structure
888
A 0.18 μm CMOS programmable interference canceller for cognitive radio front-end
889
A 0.18 μm CMOS Prototype of COFDM Demodulator for European DVB-T Standard
890
A 0.18 μm CMOS Ultra-Wideband Low-Noise Amplifier with High IIP3
891
A 0.18 µm CMOS current reuse ultra-wideband low noise amplifier (UWB-LNA) with minimized group delay variations
892
A 0.18 µm CMOS integrated transimpedance amplifier-equalizer for 2.5 Gb/s
893
A 0.18 µm CMOS multi-Gb/s 10-PAM transmitter
894
A 0.18 µm low power CMOS radio frequency LC oscillator for broadband wireless communication applications
895
A 0.18 μm CMOS 3–5GHz switched gain low noise amplifier for UWB system
896
A 0.18 μm CMOS current reuse ultra-wideband low noise amplifier (UWB-LNA) with minimized group delay variations
897
A 0.18 μm CMOS multilayer and low resistive load architecture dedicated for LoC applications
898
A 0.18 μm mixer merged with LNA exploiting noise cancellation
899
A 0.18 μm 3.0 V 64 Mb non-volatile phase-transition random-access memory (PRAM)
900
A 0.18 μm 4 Mbit toggling MRAM
901
A 0.18 μm BiCMOS technology featuring 120/100 GHz (fT/fmax) HBT and ASIC-compatible CMOS using copper interconnect
902
A 0.18 μm CMOS 10-Gb/S multichannel transmitter with duty-cycle correction
903
A 0.18 μm CMOS 900 MHz receiver front-end using RF Q-enhanced filters
904
A 0.18 μm CMOS channel select filter using Q-enhancement technique
905
A 0.18 μm CMOS distributed transversal filter for sub-nanosecond pulse synthesis
906
A 0.18 μm CMOS front-end processor for a blu-ray disc recorder with an adaptive PRML
907
A 0.18 μM CMOS fully differential transimpedance amplifier for optical receiver
908
A 0.18 μm CMOS implementation of on-chip analogue test signal generation from digital test patterns
909
A 0.18 μm CMOS low-noise elliptic low-pass continuous-time filter
910
A 0.18 μm CMOS pipelined encoder for a 5 GS/s 4-bit flash analogue-to-digital converter
911
A 0.18 μm CMOS SC lowpass filter for Bluetooth channel selection
912
A 0.18 μm CMOS SoC of a front-end hardware platform for DVD-multi recorders
913
A 0.18 μm CMOS transceiver design for high-speed backplane data communications
914
A 0.18 μm flash source side erasing improvement
915
A 0.18 μm implementation of a floating-point unit for a processing-in-memory system
916
A 0.18 μm SiGe BiCMOS UHF VCO with auto tuning for DCT AMPS and CDMA application
917
A 0.18 μm SiGe:C RFBiCMOS technology for wireless and gigabit optical communication applications
918
A 0.18 μm-CMOS near-end crosstalk (NEXT) noise canceller utilizing tunable active filters for 4-PAM/20Gbps throughput backplane channels
919
A 0.18 /spl mu/m 256 Mb DDR-SDRAM with low-cost post-mold-tuning method for DLL replica
920
A 0.18 /spl mu/m 4Mb toggling MRAM
921
A 0.18 /spl mu/m 90 GHz f/sub T/ SiGe HBT BiCMOS, ASIC-compatible, copper interconnect technology for RF and microwave applications
922
A 0.18 /spl mu/m CMOS 2.45 GHz, low-power quadrature VCO with 15% tuning range
923
A 0.18 /spl mu/m CMOS direct-conversion receiver front-end for UMTS
924
A 0.18 /spl mu/m CMOS hot-standby phase-locked loop using a noise-immune adaptive-gain voltage-controlled oscillator
925
A 0.18 /spl mu/m CMOS IA32 microprocessor with a 4 GHz integer execution unit
926
A 0.18 /spl mu/m CMOS logic technology with dual gate oxide and low-k interconnect for high-performance and low-power applications
927
A 0.18 /spl mu/m CMOS receiver for 3.1 to 10.6GHz MB-OFDM UWB communication systems
928
A 0.18 /spl mu/m dual-gate CMOS model for the design of 2.4 GHz low noise amplifier
929
A 0.18 /spl mu/m foundry RF CMOS technology with 70 GHz F/sub t/ for single chip system solutions
930
A 0.18 /spl mu/m fully depleted CMOS on 30 nm thick SOI for sub-1.0 V operation
931
A 0.18 /spl mu/m high dynamic range NTSC/PAL imaging system-on-chip with embedded DRAM frame buffer
932
A 0.18 /spl mu/m high-performance logic technology
933
A 0.18 /spl mu/m logic-based MRAM technology for high performance nonvolatile memory applications
934
A 0.18 /spl mu/m SiGe BiCMOS receiver and transmitter chipset for SONET OC-768 transmission systems
935
A 0.18 /spl mu/m Ti-salicided p-MOSFET with shallow junctions fabricated by rapid thermal processing in an NH/sub 3/ ambient
936
A 0.18 \\mu{\\rm m} CMOS Self-Mixing Frequency Tripler
937
A 0.18 \\mu {\\rm m} Biosensor Front-End Based on 1/f Noise, Distortion Cancelation and Chopp
938
A 0.18 \\mu m CMOS Quadrature VCO Using the Quadruple Push-Push Technique
939
A 0.18- \\mu\\hbox {m} CMOS Analog Min-Sum Iterative Decoder for a (32,8) Low-Density Parity-Check (LDPC) Code
940
A 0.18- \\mu\\hbox {m} CMOS Selective Receiver Front-End for UWB Applications
941
A 0.18 mum CMOS Implementation of a Low Power, Fully Differential RF Front-End for FM-UWB Based P-PAN Receivers
942
A 0.18 mum CMOS Low Power Ring VCO with 1 GHZ Tuning Range for 3-5 GHZ FM-UWB Applications
943
A 0.18 um CMOS feed forward equalizer for 10 Gb/s data transmission over multimode fiber
944
A 0.18 Um CMOS reconfigurable digital baseband transceiver with 2FSK for RFID
945
A 0.18-μm CMOS Balanced Amplifier for 24-GHz Applications
946
A 0.18μm CMOS 1000 frames/sec, 138dB Dynamic Range Readout Circuit for 3D-IC IR Focal Plane Arrays
947
A 0.18μm CMOS 2.1GHz Sub-sampling Receiver Front End with Fully Integrated Second- and Fourth-Order Q-Enhanced Filters
948
A 0.18μm CMOS 300MHz Current-Mode LF Seventh-order Linear Phase Filter for Hard Disk Read Channels
949
A 0.18μm CMOS 802.15.4a UWB Transceiver for Communication and Localization
950
A 0.18μm CMOS Direct RF Sampling Mixer for DECT Applications
951
A 0.18μm CMOS Distributed Transversal Filter with Binary-Weighted Gain Cell Design
952
A 0.18μm CMOS Fully Differential RF Demodulator for FM-UWB Based P-PAN Receivers
953
A 0.18μm CMOS Integrated Sensor for the Rapid Identification of Bacteria
954
A 0.18-μm CMOS multirate filter bank asic for biomedical applications
955
A 0.18μm CMOS Receiver with Decision-feedback Equalization for Backplane Applications
956
A 0.18-μm CMOS Squarer Circuit for a Non-Coherent UWB Receiver
957
A 0.18-μm CMOS UWB Low Noise Amplifier for Full-Band (3.1-10.6GHz) Application
958
A 0.18μm CMOS UWB transmitter with reconfigurable pulse width
959
A 0.18μm, 1.8-V CMOS High Gain Fully Differential Opamp Utilized in Pipelined ADC
960
A 0.18µm 3.25–5.6GHz and 6–10.4GHz band switchable low noise amplifier
961
A 0.18-µm CMOS 1.25-Gbps front-end receiver for low-cost short reach optical communications
962
A 0.18µm CMOS 2.5Gbps pre-amplifier with AGC
963
A 0.18-µm CMOS 3.2-10 GHz quadrature VCO for IEEE 802.15.4a UWB transceivers
964
A 0.18-µm CMOS current-mode Hall magnetic sensor with very low bias current and high sensitive front-end
965
A 0.18µm CMOS low-power charge-integration DPS for X-ray imaging
966
A 0.18µm CMOS narrow-band LNA linearization using digital base-band post-distortion
967
A 0.18µm CMOS SoC for a 100m-range 10fps 200×96-pixel time-of-flight depth sensor
968
A 0.18µm CMOS switched-capacitor amplifier using current-starving inverter based op-amp for low-power biosensor applications
969
A 0.18-µm CMOS, −92-dB THD, 105-dBA DR, third-order audio class-D amplifier
970
A 0.18-µm CMOS, 91%-Efficiency, 2-A Scalable Buck-Boost DC–DC Converter for LED Drivers
971
A 0.18µm pipelined 8B10B encoder for a high-speed SerDes
972
A 0.18μm 1V 5GHz LC VCO designed for WSN applications
973
A 0.18-μm BiCMOS wide locking-range divide-by-2 injection-locked frequency divider with dual-injection
974
A 0.18-μm CMOS 16-GHz varactorless LC-VCO with 1.2-GHz tuning range
975
A 0.18μm CMOS 91%-efficiency 0.1-to-2A scalable buck-boost DC-DC converter for LED drivers
976
A 0.18μm CMOS 9mW current-mode FLF linear phase filter with gain boost
977
A 0.18-μm CMOS clock and data recovery circuit with reference-less dual loops
978
A 0.18-μm CMOS fully integrated 0.7–6 GHz PLL-based complex dielectric spectroscopy system
979
A 0.18-μm CMOS fully integrated antenna pulse transceiver with leakage-cancellation technique for wide-band microwave range sensing radar
980
A 0.18μm CMOS fully integrated RFDAC and VGA for WCDMA transmitters
981
A 0.18μm CMOS high linearity flat conversion gain down-conversion mixer for UWB receiver
982
A 0.18μm CMOS low power LNA for 6–8.5 GHz UWB receivers
983
A 0.18-μm CMOS shock wave generator with an on-chip antenna and a digitally programmable delay circuit
984
A 0.18μm CMOS single-photon sensor for coaxial laser rangefinders
985
A 0.18μm CMOS T/R switch for 900MHz wireless application
986
A 0.18μm CMOS up-conversion mixer for wireless sensor networks application
987
A 0.18μm front end for ECG/EEG/neural sensor interface
988
A 0.18μm SOI BCD technology for automotive application
989
A 0.18-μm-CMOS low-power reconfigurable low pass filter for multi-standard receivers
990
A 0.18μm 102dB-SNR mixed CT SC audio-band ΔΣ ADC
991
A 0.18-μm 10-GHz CMOS ring oscillator for optical transceivers
992
A 0.18μm CMOS 10-6 lux bioluminescence detection system-on-chip
993
A 0.18-μm CMOS 1-Gb/s serial link transceiver by using PWM and PAM techniques
994
A 0.18-μm CMOS 3.5-gb/s continuous-time adaptive cable equalizer using enhanced low-frequency gain control method
995
A 0.18-μm CMOS bioluminescence detection lab-on-chip
996
A 0.18μm CMOS Bluetooth frequency synthesizer for integration with a Bluetooth SOC reference platform
997
A 0.18μm CMOS Dual-Band UWB Transceiver
998
A 0.18μm CMOS equalizer with an improved multiplier for 4-PAM/20Gbps throughput over 20 inch FR-4 backplane channels
999
A 0.18-μm CMOS front-end processor for a Blu-Ray Disc recorder with an adaptive PRML
1000
A 0.18μm CMOS fully integrated 6.25Gbps single aggressor multi-rate crosstalk cancellation IC for legacy backplane and interconnect applications
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