ليست عنوان مقالات لاتين فني مهندسي FPGA based multi-sampling pulse compensation method with deadbeat control for single phase PWM inverter FPGA implementation of optimal and approximate model predictive control for a buck-boost DC-DC converter

<< مقالات لاتين فني مهندسي >>

<< بر اساس عنوان >>

1

FPGA based multi-sampling pulse compensation method with deadbeat control for single phase PWM inverter

2

FPGA Based Nature Noise Reduction and RFI Removing in Radio Astronomy

3

FPGA based network intrusion detection using content addressable memories

4

FPGA Based Network Traffic Analysis Using Traffic Dispersion Patterns

5

FPGA Based Neural Network PID Controller for Line-Scan Camera in Sensorless Environment

6

FPGA based nodes for sub-microsecond synchronization of cyber-physical production systems on high availability ring networks

7

FPGA based non-invasive heart rate monitoring system for detecting abnormalities in Fetal

8

FPGA based nonlinear Support Vector Machine training using an ensemble learning

9

FPGA Based Novel High Speed DAQ System Design with Error Correction

10

FPGA Based Object Tracking System

11

FPGA based on board computer for LEO satellites

12

FPGA based on integration of carbon nanorelays and CMOS devices

13

FPGA Based on Integration of CMOS and RRAM

14

FPGA based on integration of memristors and CMOS devices

15

FPGA based on-chip memory for data dependent applications

16

FPGA based one-cycle control of multilevel cascaded H-Bridge inverter

17

FPGA based on-line complex-number multipliers

18

FPGA based optimization for masked AES implementation

19

FPGA based optimized SHA-3 finalist in reconfigurable hardware

20

FPGA based palmprint and palm vein biometric system

21

FPGA based parallel architecture implementation of Stacked Error Diffusion algorithm

22

FPGA Based Parallel Architectures for Normalized Cross-Correlation

23

FPGA based parallel connection system of separate voltage sources

24

FPGA based parallel neighborhood search

25

FPGA Based Parallel Thinning for Binary Fingerprint Image

26

FPGA based partial reconfigurable fir filter design

27

FPGA Based Particle Identification in High Energy Physics Experiments

28

FPGA based Passive Auto Focus System using Adaptive Thresholding

29

FPGA based path solvers for DFGs in high level synthesis

30

FPGA based phase detector for high-speed clocks with pico-seconds resolution

31

FPGA based pi/4-DQPSK complex wavelet packet modulation

32

FPGA based pipelined architecture for action potential simulation in biological neural systems

33

FPGA based pipelined architecture for RC5 encryption

34

FPGA based PMAC motor control for system-on-chip applications

35

FPGA based predictive deadbeat control for high switching frequency SEPIC

36

FPGA based preliminary CAD for kidney on IoT enabled portable ultrasound imaging system

37

FPGA based processing of digital signals using Walsh analysis

38

FPGA based prototyping of next generation forward error correction

39

FPGA based prototyping using a target driven FSM partitioning strategy

40

FPGA based PWM control of lnduction motor drive and its parameter estimation

41

FPGA based radar image enhanced: A robust evolutionary controlled filter approach

42

FPGA based random waveform generators for noise radars

43

FPGA based readout electronics for multi anode PSPMT

44

FPGA Based Real Time ´Secure´ Body Temperature Monitoring Suitable for WBSN

45

FPGA based real time electro-thermal modeling of power electronic converters

46

FPGA Based Real Time Embedded Color Tracking Mobile Robot

47

FPGA based real time face detection using Adaboost and histogram equalization

48

FPGA based real time fuzzy fault detection algorithm

49

FPGA based real time implementation scheme for ARINC 659 backplane data bus

50

FPGA based real time simulation of a Matrix Converter

51

FPGA Based Real Time Solution for Sensitivity Time Control

52

FPGA based real time video distortion correction

53

FPGA based realization of a reduced complexity high speed decoder for error correction

54

FPGA based realization of OFDM transceiver system for Software Defined Radio

55

FPGA based real-time adaptive filtering for space applications

56

FPGA based real-time adaptive fuzzy logic controller

57

FPGA Based Real-Time Data Processing DAQ System for the Mercury Imaging X-Ray Spectrometer

58

FPGA based real-time efficient histogram equalization

59

FPGA based real-time image segmentation for medical systems and data processing

60

FPGA based real-time object detection approach with validation of precision and performance

61

FPGA based real-time signal processor for Pulse Doppler Radar

62

FPGA Based Real-Time Target Tracking on a Mobile Platform

63

FPGA Based Real-Time Tracking Approach with Validation of Precision and Performance

64

FPGA based real-time visual servoing

65

FPGA Based Reconfigurable 200 MHz Transmitter and Receiver Front End for MIMO-OFDM

66

FPGA based reconfigurable body area network using Nios II and uClinux

67

FPGA Based Reconfigurable IPSec AH Core Suitable for IoT Applications

68

FPGA Based Reconfigurable Platform for Complex Image Processing

69

FPGA based re-configurable wireless sensor network protocol

70

FPGA based Recursive Error Free Mitchell Log Multiplier for image Filters

71

FPGA based Rekeying for cryptographic key management in Storage Area Network

72

FPGA based RNG for random WOB method in unit cube capacitance calculation

73

FPGA based robots hardware efficient scheme for Real time indoor environment with behavioural control

74

FPGA based robust controller applied to a boost converter

75

FPGA based router for cognitive packet networks

76

FPGA Based Run Time Reconfigurable Gas Discrimination System

77

FPGA based runtime configurable clause evaluator for SAT problems

78

FPGA Based Scalable Fixed Point QRD Core Using Dynamic Partial Reconfiguration

79

FPGA based selective harmonic elimination pulse width modulation technique

80

FPGA based self calibrating 40 picosecond resolution, wide range Time to Digital Converter

81

FPGA Based Sensory/Actuation Embedded System

82

FPGA based sequential switching control strategy for a three phase inverter

83

FPGA based signal injection sensorless control of SMPMSM using Delta-Sigma A/D conversion

84

FPGA based signal processing module design and implementation for FMCW vehicle radar systems

85

FPGA based signal processing structures

86

FPGA Based Signal-Processing for Radio Detection of Cosmic Rays

87

FPGA based silicon innovation exploiting “More than Moore” technology

88

FPGA Based Silicon Spiking Neural Array

89

FPGA based single cycle, reconfigurable router for NoC applications

90

FPGA based singular value decomposition for image processing applications

91

FPGA based sliding mode control for high frequency power converters

92

FPGA based sliding mode control for high frequency SEPIC

93

FPGA based Smart Card reader

94

FPGA based Sobel algorithm as vehicle edge detector in VCAS

95

FPGA based SoC for automated cDNA microarray image processing

96

FPGA based soft sensor for the estimation of the kerosene freezing point

97

FPGA based soft-core SIMD processing: A MIMO-OFDM Fixed-Complexity Sphere Decoder case study

98

FPGA based space vector modulated trigger controller for a frequency converter

99

FPGA based Space Vector PWM Control IC for Three Phase Induction Motor Drive

100

FPGA Based Sparse Matrix Vector Multiplication using Commodity DRAM Memory

101

FPGA based SPECAN algorithm implementation for ScanSAR imaging

102

FPGA based speed control of Brushless DC Motors using IOPT Petri Net models

103

FPGA based Speeded Up Robust Features

104

FPGA based stereo imaging system with applications in computer gaming

105

FPGA Based Stereo Vision System to Display Disparity Map in Realtime

106

FPGA based stereo vision system to show video of dense disparity map

107

FPGA Based Symmetric Multi-core Processors for Optimized Performance of H.264 Encoder

108

FPGA based Synchronized Sinusoidal Pulse Width Modulation with smooth transition into overmodulation and six step modes of operation for three phase AC motor drives

109

FPGA Based System design suitable for Wireless Health Monitoring Employing Intelligent RF module

110

FPGA based system for blood glucose sensing using photoplethysmography and online motion artifact correction using adaline

111

FPGA based system for color space transformation RGB to YIQ and YCbCr

112

FPGA Based System for Open, Short, and RC Impedance Measurement

113

FPGA based system for real-time structure from motion computation

114

FPGA based system for the generation of noise with programmable power spectrum

115

FPGA based system for video compression and transmission over bluetooth

116

FPGA based system prototype for face location and recording of people getting on a public transport bus

117

FPGA based systems with linear and non-linear signal processing capabilities

118

FPGA based systolic array architectures for computing the discrete Fourier transform

119

FPGA based TDC using Virtex-4 ISERDES blocks

120

FPGA based three phase sinusoidal PWM VVVF controller

121

FPGA based time detection of spikes within neural signals

122

FPGA based time domain Passivity Observer and Passivity Controller

123

FPGA based time-of-flight 3D camera characterization system

124

FPGA based traffic sign detection for automotive camera systems

125

FPGA based TRNG using automatic calibration

126

FPGA based trustworthy authentication technique using Physically Unclonable Functions and artificial intelligence

127

FPGA based ultrasound backend system with image enhancement technique

128

FPGA based Ultra-Wideband pseudo-noise radar

129

FPGA based UWB MISO time-reversal system design and implementation

130

FPGA based variable structure control for switched D.C/D.C converters

131

FPGA based vector control of PM motor using sliding mode observer

132

FPGA based video object segmentation

133

FPGA based video processing system for ubiquitous applications

134

FPGA based visual prosthesis device for testing visual perception on non human primates

135

FPGA based wheelchair autonavigation for people with mobility issues

136

FPGA based white box verifleation methodology for SOC design

137

FPGA based wide range optical sensor: Vibration detection of compressor blades in high speed turbine engines

138

FPGA based wireless sensor node for distributed process monitoring

139

FPGA based-IC design for 3-phase PWM inverter with optimized space vector modulation schemes

140

FPGA based-IC design for inverter with vector modulation technique

141

FPGA bitstream compression and decompression based on LZ77 algorithm and BMC technique

142

FPGA bitstream protection with PUFs, obfuscation, and multi-boot

143

FPGA Blokus Duo Solver using a massively parallel architecture

144

FPGA board for real time vision development systems

145

FPGA Bootstrapping on PCIe Using Partial Reconfiguration

146

FPGA bridging fault detection and location via differential I_DDQ

147

FPGA bulding blocks for an hybrid base band digital predistorter suitable for 3G poweramplifiers

148

FPGA CCSDS command decoder with BCH EDAC and level-0 command execution

149

FPGA challenges and opportunities at 40nm and beyond

150

FPGA Chip as a System Master for Hardware Aided Parallel Computing

151

FPGA Circuit Synthesis of Accelerator Data-Parallel Programs

152

FPGA Cluster Computing in the ETA Radio Telescope

153

FPGA code accelerators - The compiler perspective

154

FPGA Codesign Implementation of Vector Directional Filter

155

FPGA Communication Framework

156

FPGA computer architectures

157

FPGA computing in a data parallel C

158

FPGA Configuration by TCP/IP and Ethernet

159

FPGA control and implementation of a multiphase-interleaved PWM inverter for a segmented PMSM

160

FPGA control of SIMO DC-DC converters using load current estimation

161

FPGA control of the neutral point clamped quasi-Z-source inverter

162

FPGA controlled cyclo-inverter

163

FPGA controlled DDS based frequency sweep generation of high linearity for FMCW radar systems

164

FPGA controlled dual buck half bridge three-level inverter

165

FPGA controlled high frequency resonant converter for contactless power transfer

166

FPGA controlled high gain bi-directional DC-DC converter (BDC)for energy storage of solar power

167

FPGA controlled integrated optical cross-connect module for high port-density optical packet switch

168

FPGA controlled MEMS inclinometer

169

FPGA controlled microring based tunable add-drop filter

170

FPGA Controller Based Z-Source Inverter for Wind Turbine Driven Permanent Magnet Generator

171

FPGA controller for power converters with integrated oscilloscope and graphical user interface

172

Fpga conversion gets more structured

173

FPGA core network implementation and optimization: a case study

174

FPGA core PDN design optimization

175

FPGA core watermarking based on power signature analysis

176

FPGA correlator architecture using random-pulse data representation

177

FPGA Curved Track Fitter With Very Low Resource Usage

178

FPGA Curved Track Fitters and a Multiplierless Fitter Scheme

179

FPGA dedicated hardware architecture of 3D image reconstruction: Marching cubes algorithm

180

FPGA defect tolerance: impact of granularity

181

FPGA Design Analysis of the Clustering Algorithm for the CERN Large Hadron Collider

182

FPGA design and implementation for real time vision applications on NTACO mobile robot

183

FPGA Design and Implementation for Real-Time Electromagnetic Transient Simulation System

184

FPGA design and implementation for vertex extraction of polygonal shapes

185

FPGA Design and Implementation Issues of Artificial Neural Network Based PID Controllers

186

FPGA design and implementation of a low-power systolic array-based adaptive Viterbi decoder

187

FPGA design and implementation of a matrix multiplier based accelerator for 3D EKF SLAM

188

FPGA design and implementation of a real-time stereo vision system

189

FPGA Design and Implementation of a Real-Time Stereo Vision System

190

FPGA design and implementation of a real-time vehicle detection system

191

FPGA Design and Implementation of an Improved 32-bit Binary Logarithm Converter

192

FPGA design and implementation of carrier synchronization for DVB-S2 demodulators

193

FPGA design and implementation of Digital Up-Converter using quadrature oscillator

194

FPGA design and implementation of Direct Matrix Inversion based on steepest descent method

195

FPGA design and implementation of edge enhancement by using 3×3 mask filter

196

FPGA design and implementation of Electrocardiogram biomedical embedded system

197

FPGA design and implementation of fixed width standard and truncated 6×6-bit multipliers: A comparative study

198

FPGA Design and Implementation of MIMO Decoder for 1 Gbps Wireless LAN

199

FPGA design and implementation of pulse shaping filter for coherent underwater communication

200

FPGA design and implementation of radix-2 Fast Fourier Transform algorithm with 16 and 32 points

201

FPGA Design and Implementation of UDCM for the WiBro System

202

FPGA Design and Performance Evaluation of a Pulse-Based Echo Canceller for DVB-T/H

203

FPGA design and realization of ground testing equipment bus interface for microwave remote sensor on satellite

204

FPGA Design and Simulation of the Adaptive Edge Detection Pre-processor

205

FPGA Design Considerations in the Implementation of a Fixed-Throughput Sphere Decoder for MIMO Systems

206

FPGA Design for Algebraic Tori-Based Public-Key Cryptography

207

FPGA Design for Controlling Humanoid Robot Arms by Exoskeleton Motion Capture System

208

FPGA design for decimeter scale integration (DMSI)

209

FPGA Design for Direct Sliding Mode Current Control of a Synchronous Machine

210

FPGA design for dual-spectrum visual scene preparation in retinal prosthesis

211

FPGA design for image processing using a GUI of a web-based VHDL Code Generator

212

FPGA design for monitoring CANbus traffic in a prosthetic limb sensor network

213

FPGA design for multi-filtering techniques using flag-bit and flicker clock

214

FPGA Design for PCANet Deep Learning Network

215

FPGA design for real time flaw detection on edges using the LEDges technique

216

FPGA design for reflective memory network communication technology

217

FPGA Design for Statistics-Inspired Approximate Sum-of-Squared-Error Computation in Multimedia Applications

218

FPGA Design for Timing Yield Under Process Variations

219

FPGA design for user’s presence detection

220

FPGA design methodology for DSP industrial applications - A case study of a three-phase positive-sequence detector

221

FPGA Design Methodology for Industrial Control Systems—A Review

222

FPGA design of a fast 32-bit floating point multiplier unit

223

FPGA Design of A H.264/AVC Main Profile Decoder for HDTV

224

FPGA design of a multicore neuromorphic processing system

225

FPGA design of a new frequency relay based on evolutionary algorithms

226

FPGA design of a pulse encoder for optoelectronic neural stimulation and recording arrays

227

FPGA design of a queue management equipment with variable-length packets switching on the satellite onboard switch

228

FPGA design of a real-time implementation of dynamic range compression for improving television picture

229

FPGA design of a real-time obstacle detection system using stereovision

230

FPGA design of a robust phase locked loop algorithm for a three phase PWM grid connected converter

231

FPGA design of a ROM-less Direct Digital Frequency Synthesizer

232

FPGA design of a truncated SVD based receiver for the detection of SEFDM signals

233

FPGA design of a variable sampling period PLL with a Digital Notch Filter for distorted grids

234

FPGA Design of an Automatic Target Generation Process for Hyperspectral Image Analysis

235

FPGA design of an even power distributor for optoelectronic neural stimulation

236

FPGA Design of an Open-Loop True Random Number Generator

237

FPGA design of arbitrary down-sampler

238

FPGA Design of Box-Constrained MIMO Detector

239

FPGA Design of Digital Codec for Passive RFID Tag

240

FPGA Design of Fast Lifting Wavelet Transform

241

FPGA design of fixed-complexity high-throughput MIMO detector based on QRDM algorithm

242

FPGA design of H.264/AVC intra-frame prediction architecture for high resolution video encoding

243

FPGA design of HECC coprocessors

244

FPGA design of high throughput LDPC decoder based on imprecise Offset Min-Sum decoding

245

FPGA Design of onboard queue management equipment based on occupancy

246

FPGA design of polyphase filter bank spectrum channalizer

247

FPGA design of single-phase matrix converter operating as a frequency changer

248

FPGA Design of Single-phase Matrix Converter Operating as Cycloconverter

249

FPGA design of the computation unit for the semi-global stereo matching algorithm

250

FPGA design of the decoding functions in the physical layer adaptation subsystem of the XG-PON optical network unit/terminal

251

FPGA design on saturation correction in radar digital IF receiver

252

FPGA design principles

253

FPGA design productivity a discussion of the state of the art and a research agenda

254

FPGA design projects with animated problems

255

FPGA design security with time division multiplexed PUFs

256

FPGA design space exploration of IDEA cryptography IP core

257

FPGA design turns to graphs

258

FPGA design with Mentor and Altera CAD software

259

FPGA designs of parallel high performance GF(2²³³) multipliers [cryptographic applications]

260

FPGA Designs with Optimized Logarithmic Arithmetic

261

FPGA development tools: keeping pace with design complexity

262

FPGA development tools: keeping pace with design complexity

263

FPGA device and architecture evaluation considering process variations

264

FPGA digital down converter IP for SDR terminals

265

FPGA Downloading Circuit Design and Implementation

266

FPGA dynamic reconfiguration using the RVC technology: Inverse quantization case study

267

FPGA education and research activities in Taiwan

268

FPGA e-Lab, a Technique to Remote Access a Laboratory to Design and Test

269

FPGA electronics for OPET: A dual-modality optical and positron emission tomograph

270

FPGA Electronics for OPET: A Dual-Modality Optical and Positron Emission Tomograph

271

FPGA embedded hardware system for finger vein biometric recognition

272

FPGA embedded single-cycle 16-bit microprocessor and tools

273

FPGA embedded system for ultrasound particle manipulation with Sonotweezers

274

FPGA emulation and prototyping of a cyberphysical-system-on-chip (CPSoC)

275

FPGA Emulation environment of different digital carrier synchronizers

276

FPGA emulation of a spike-based, stochastic system for real-time image dewarping

277

FPGA emulation of quantum circuits

278

FPGA emulators in digital circuits education

279

FPGA family composition and effects of specialized blocks

280

FPGA FFT implementation

281

FPGA Field Oriented Control of an Axial Flux motor-in-wheel

282

FPGA fingerprinting techniques for protecting intellectual property

283

FPGA finite difference time domain solver for thermal simulation

284

FPGA Floating Point Datapath Compiler

285

FPGA for fuzzy controllers

286

FPGA for high-performance bit-serial pipeline datapath

287

FPGA for industrial control systems

288

FPGA Frequency Domain Based GPS Coarse Acquisition Processor Using FFT

289

FPGA fuzzy logic controller for variable speed generators

290

FPGA Gaussian random number generator based on quintic hermite interpolation inversion

291

FPGA Gaussian Random Number Generators with Guaranteed Statistical Accuracy

292

FPGA Generators of Combinatorial Configurations in a Linear Array Model

293

FPGA glitch power analysis and reduction

294

FPGA global routing architecture optimization using a multicommodity flow approach

295

FPGA global routing based on a new congestion metric

296

FPGA HardCore single processor implementation of RT control applications

297

FPGA Hardware Architecture of the Steganographic ConText Technique

298

FPGA hardware architecture with parallel data processing to detect moving objects using the background image subtraction technique

299

FPGA hardware devices with single-instruction driving for an embedded mobile computing platform

300

FPGA hardware implementation of an RNS FIR digital filter

301

FPGA hardware in the loop validation of direct torque control for induction motor

302

FPGA hardware nonlinear control design for modular CubeSat attitude control system

303

FPGA hardware of the LSB steganography method

304

FPGA hardware resources optimization on efficient correlation algorithm for multilevel CSS

305

FPGA hardware results for power system computation

306

FPGA hardware synthesis from MATLAB

307

FPGA hierarchical architecture for a Positron Emission Tomography Scanner

308

FPGA HIL simulation of a linear system block for strongly coupled system applications

309

FPGA HiL simulation of back-to-back converter PMSG wind turbine systems

310

FPGA hybrid controller for unity power factor

311

FPGA I/O: when to go serial

312

FPGA implementable architecture for geometric global positioning

313

FPGA implementaion of FEC for 10G-EPON

314

FPGA implementaion: Smart card based license management using iris scanning approach

315

FPGA implementation analysis of polyphase channelizer performing sample rate change required for both matched filtering and channel frequency spacing

316

FPGA implementation and analysis of a multilevel coded modulation scheme

317

FPGA implementation and analysis of random delay insertion countermeasure against DPA

318

FPGA implementation and DPA resistance analysis of a lightweight HMAC construction based on photon hash family

319

FPGA implementation and evaluation of a simple processor for multi-scalar/vector/matrix instructions

320

FPGA implementation and evaluation of discrete-time chaotic generators circuits

321

FPGA implementation and evaluation of two cryptographically secure hybrid cellular automata

322

FPGA implementation and experimental performances of a novel timing synchronization method in MIMO-OFDM systems

323

FPGA Implementation and Performance Evaluation of a Digital Carrier Synchronizer Using Different Numerically Controlled Oscillators

324

FPGA implementation and performance evaluation of a simultaneous multithreaded matrix processor

325

FPGA Implementation and Performance Evaluation of AES-CCM Cores for Wireless Networks

326

FPGA implementation and performance evaluation of WCDMA system over AWGN channel

327

FPGA Implementation and Power Modelling of the Fast Walsh Transform

328

FPGA implementation and resource utilization for QRD-RLS systolic array for signal processing applications

329

FPGA implementation and simulink integration of CFO module in WiMAX receiver model

330

FPGA implementation and testing of VXIbus interface hardware

331

FPGA implementation and verification of LDPC encoder with weight (3, 6) approximate lower triangular matrix

332

FPGA implementation and verification of LDPC minimum sum algorithm decoder with weight (3, 6) regular parity check matrix

333

FPGA implementation and verification of Reed-Solomon (31, 15, 8) code in SDR system

334

FPGA Implementation and Verification of Reed-Solomon (63, 47, 8) Code in SDR System

335

FPGA implementation cost and performance evaluation of the IEEE 802.16e and IEEE 802.11i security architectures based on AES-CCM

336

FPGA implementation folding

337

FPGA implementation for 2D discrete wavelet transform

338

FPGA implementation for a recursive least square algorithm

339

FPGA implementation for an iris biometric processor

340

FPGA implementation for an optimized CORDIC module for OFDM system

341

FPGA implementation for channel estimations based on Wiener LMS for DS-CDMA

342

FPGA Implementation for Direct Kinematics of a Spherical Robot Manipulator

343

FPGA implementation for generation of six phase pulse compression sequences

344

FPGA implementation for GPR signal processing based on HW/SW co-design architecture

345

FPGA implementation for humidity and temperature remote sensing system

346

FPGA implementation for image object detection system on NoCs

347

FPGA Implementation for Image Processing Module in TCON

348

FPGA implementation for power spectral estimation using grouped B-Spline windows

349

FPGA implementation for real-time Chroma-key effect using Coarse and Fine Filter

350

FPGA Implementation for Real-Time Empirical Mode Decomposition

351

FPGA implementation for speed monitoring and speed control of a DC motor using fuzzy logic

352

FPGA implementation for stereo matching algorithm

353

FPGA implementation made easy for applied digital signal processing courses

354

FPGA implementation of (p)-monotone sum of basic t-norms

355

FPGA implementation of 1 Gbps real-time 4×4 MIMO-MLD

356

FPGA implementation of 16 bit BBS and LFSR PN sequence generator: A comparative study

357

FPGA Implementation of 160- Bit Vedic Multiplier

358

FPGA implementation of 16-point radix-4 complex FFT core using NEDA

359

FPGA implementation of 1D wave equation for real-time audio synthesis

360

FPGA implementation of 2D cross-correlation for real-time 3D tracking of deformable surfaces

361

FPGA Implementation of 2-D DCT Engine for Vision Based Tracking of Dynamic Obstacles

362

FPGA implementation of 2D interactive sound communication system

363

FPGA implementation of 2D wavelet transform

364

FPGA implementation of 2FSK modulation system based on DDS

365

FPGA implementation of 300Mbps 2×3 MIMO-OFDM transceiver for IEEE 802.11n wireless LANs

366

FPGA implementation of 3D discrete wavelet transform for real-time medical imaging

367

FPGA implementation of 3-D separable Gauss filter using pipeline rotation structures

368

FPGA Implementation of 3-D Thermal Model Simulator

369

FPGA Implementation of 3Mbps Single Carrier Mobile Wireless System with 1MHz Bandwidth

370

FPGA implementation of 4 samples DWT based on the model of pyramidal structural data coding

371

FPGA implementation of 4×4 MIMO test-bed for spatial multiplexing systems

372

FPGA implementation of 4-channel ICA for on-line EEG signal separation

373

FPGA implementation of 64 bit Secure Force algorithm using full loop-unroll architecture

374

FPGA Implementation of 64-Bit Exponential Function for HPC

375

FPGA Implementation of 8, 16 and 32 Bit LFSR with Maximum Length Feedback Polynomial Using VHDL

376

FPGA implementation of 8-bit RISC microcontroller for embedded systems

377

FPGA implementation of a “dynamic-clamp” system

378

FPGA implementation of a 1,090 MHz SSR receiving and precision TOA estimation station

379

FPGA Implementation of a 16-Channel Lock-In Laser Light Scattering System

380

FPGA implementation of a 2G fibre channel link encryptor with authenticated encryption mode GCM

381

FPGA Implementation of a 3/spl times/3 window median filter based on a new efficient bit-serial sorting algorithm

382

FPGA implementation of a 3GPP turbo codec

383

FPGA implementation of a 64-Bit BID-based decimal floating-point adder/subtractor

384

FPGA implementation of a Bartlett direction of arrival algorithm for a 5.8ghz circular antenna array

385

FPGA implementation of a BCH Codec for free space optical communication system

386

FPGA Implementation of a Best-Precision Fixed-Point Digital PID Controller

387

FPGA implementation of a binary32 floating point cube root

388

FPGA implementation of a blind source separation system based on stochastic computing

389

FPGA implementation of a Boolean neuronal network

390

FPGA Implementation of a Canonical Signed Digit Multiplier-less based FFT Processor for Wireless Communication Applications

391

FPGA implementation of a CDMA source coding and modulation subsystem for a multiband fluorometer with pattern recognition capabilities

392

FPGA implementation of a CDMA/SDMA system with transmit diversity

393

FPGA Implementation of a Cellular Compact Genetic Algorithm

394

FPGA implementation of a cellular univariate estimation of distribution algorithm and block-based neural network as an evolvable hardware

395

FPGA Implementation of a Change-Driven Image Processing Architecture for Optical Flow Computation

396

FPGA Implementation of a Channel Equalizer Based on LMS Algorithm

397

FPGA implementation of a channel noise canceller for image transmission

398

FPGA implementation of a chaotic oscillator using RK4 method

399

FPGA implementation of a clockless stochastic LDPC decoder

400

FPGA implementation of a coherent optical receiver front-end: High-level design and test methodology

401

FPGA implementation of a coherent SOQPSK-TG demodulator

402

FPGA implementation of a combined hamming ? AES error tolerant algorithm for on board satellite

403

FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability

404

FPGA Implementation of a Configurable Complex Blind Adaptive Equalizer

405

FPGA implementation of a configurable viterbi decoder for software radio receiver

406

FPGA implementation of a CORDIC-based radix-4 FFT processor for real-time harmonic analyzer

407

FPGA implementation of a CTC decoder for H-ARQ compliant WiMAX systems

408

FPGA Implementation of a Data-Driven Stochastic Biochemical Simulator with the Next Reaction Method

409

FPGA implementation of a deadbeat direct torque and flux control scheme for induction machines

410

FPGA Implementation of a Decimal Floating-Point Accurate Scalar Product Unit with a Parallel Fixed-Point Multiplier

411

FPGA implementation of a dedicated self control strategy for a delta inverter fed BDCM drive

412

FPGA implementation of a Deep Belief Network architecture for character recognition using stochastic computation

413

FPGA implementation of a demux based on a multirate filter bank

414

FPGA implementation of a deterministic bit-stream neuron

415

FPGA implementation of a digital controller for a dc-dc converter using floating point arithmetic

416

FPGA Implementation of a Digital FM Modem

417

FPGA implementation of a digital FM modem for SDR architecture

418

FPGA implementation of a Digital Front End block for a Multi-Carrier Multi-Antenna system

419

FPGA Implementation of a Digital Sequential Phase-Shift Stroboscope for In-Plane Vibration Measurements With Subpixel Accuracy

420

FPGA implementation of a DSP core for full rate and half rate GSM vocoders

421

FPGA implementation of a DTC strategy dedicated to three-switch three-phase inverter-fed induction motor drives

422

FPGA Implementation of a Face Detector using Neural Networks

423

FPGA implementation of a factorization processor for soft-decision reed-solomon decoding

424

FPGA implementation of a faithful polynomial approximation for powering function computation

425

FPGA Implementation of a Fast MDCT Algorithm

426

FPGA implementation of a fast pipeline architecture for JND computation

427

FPGA implementation of a fastflex supervisory control and data acquisition (SCADA) remote telemetry unit

428

FPGA implementation of a feature extraction technique based on Fourier transform

429

FPGA implementation of a FEC decoding subsystem for a DVB-S2 receiver

430

FPGA implementation of a fetal heart rate measuring system

431

FPGA implementation of a FIR filter using residue arithmetic

432

FPGA Implementation of a Fixed Latency Scheme in a Signal Packet Router for the Upgrade of ATLAS Forward Muon Trigger Electronics

433

FPGA implementation of a flexible decoder for long LDPC codes

434

FPGA implementation of a flexible synchronizer for cognitive radio applications

435

FPGA implementation of a foveal image processing system for UAV applications

436

FPGA implementation of a frequency adaptive learning SOFM for digital color still imaging

437

FPGA implementation of a fuel cell emulator

438

FPGA implementation of a full HD real-time HEVC main profile decoder

439

FPGA implementation of a fully digital CDR for plesiochronous clocking systems

440

FPGA implementation of a fully digital demodulation technique for biomedical application

441

FPGA implementation of a fully digital FM demodulator

442

FPGA implementation of a fuzzy controller for automobile DC-DC converters

443

FPGA Implementation of a Fuzzy Controller for Neural Network Based Adaptive Control of a Flexible Joint with Hard Nonlinearities

444

FPGA implementation of a gain-scheduled controller for transient optimization of resonant converters applied to induction heating

445

FPGA implementation of a general purpose HMM processor based on token passing algorithm

446

FPGA implementation of a general Space Vector approach on a 6-leg voltage source inverter

447

FPGA implementation of a GF(2^2M) multiplier for use in pairing based cryptosystems

448

FPGA Implementation of a GLST-MIMO System

449

FPGA implementation of a greedy algorithm for set covering

450

FPGA implementation of a HART-Ethernet smart industrial interface

451

FPGA implementation of a high speed VLSI architecture for CORDIC

452

FPGA implementation of a high-resolution time-to-digital converter

453

FPGA Implementation of a Huffman Decoder for High Speed Seismic Data Decompression

454

FPGA implementation of a hybrid neural fuzzy controller for flexible-joint manipulators with uncertain dynamics

455

FPGA Implementation of a Hybrid Sensorless Control of SMPMSM in the Whole Speed Range

456

FPGA implementation of a large-number multiplier for fully homomorphic encryption

457

FPGA Implementation of a Lattice Quantum Chromodynamics Algorithm Using Logarithmic Arithmetic

458

FPGA implementation of a L-band Digital Aeronautical Communications System (L-DACS1) physical layer(PHY)

459

FPGA implementation of a Lead-Acid Battery for photovoltaic applications

460

FPGA implementation of a library of adaptive control laws for PMSM

461

FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators

462

FPGA implementation of a linear systolic array for speech recognition based on HMM

463

FPGA implementation of a lossless to lossy bitonal image compression system

464

FPGA implementation of a lossy compression algorithm for hyperspectral images with a high-level synthesis tool

465

FPGA Implementation of a Low Complexity Efficient Traceback Viterbi Decoder for Wireless Applications

466

FPGA implementation of a low complexity steganographic system for digital images

467

FPGA implementation of a low power, processor-independent and reusable System-on-Chip platform

468

FPGA implementation of a low-area/high-SFDR DDFS architecture

469

FPGA implementation of a low-complexity fading filter for multipath Rayleigh fading simulator

470

FPGA implementation of a low-cost method for tracking the resonance frequency and the quality factor of MEMS sensors

471

FPGA implementation of A MASH 1-1-1 delta-sigma modulator infractional-N phase locked loop for fuzzy control application

472

FPGA implementation of a matrix structure for integer division

473

FPGA implementation of a median filter

474

FPGA implementation of a message-passing OFDM receiver for impulsive noise channels

475

FPGA implementation of a microcoded elliptic curve cryptographic processor

476

FPGA implementation of a MIMO DFE IN 40 GB/S DQPSK optical links

477

FPGA implementation of a MIMO receiver front-end for the UMTS downlink

478

FPGA implementation of a minutiae extraction fingerprint algorithm

479

FPGA implementation of a modified advanced encryption standard algorithm

480

FPGA implementation of a modified hard decision decoding for 2-D TPC

481

FPGA implementation of a modified pulse mode FCM image segmentation algorithms

482

FPGA implementation of a modular active noise control system

483

FPGA Implementation of a Modulated Complex Lapped Transform for Watermarking Systems

484

FPGA implementation of a multi-algorithm parallel FEC for SDR platforms

485

FPGA implementation of a multicasting crossbar switch

486

FPGA implementation of a multi-channel HDLC protocol transceiver

487

FPGA implementation of a multilayer Artificial Neural Network using System-on-Chip design methodology

488

FPGA implementation of a multilayer perceptron neural network using VHDL

489

FPGA Implementation of a Multi-Level SPWM for Three-Level NPC Inverter

490

FPGA implementation of a multimodal sample rate converter and synchronizer

491

FPGA Implementation of a Multi-Rate Punctured Viterbi Decoder Compatible with the DVB-T Standard

492

FPGA implementation of a neural network classifier for gas sensor array applications

493

FPGA implementation of a neural network for a real-time hand tracking system

494

FPGA implementation of a new family of stack filters

495

FPGA implementation of a new hybrid modulation strategy for a modified dual bridge multilevel dc-link inverter topology

496

FPGA implementation of a new hybrid rotor position estimation scheme based on three symmetrical locked Hall effect position sensors

497

FPGA implementation of a new parallel routing algorithm

498

FPGA implementation of a new scheme for the circuit realization of PWL functions

499

FPGA implementation of a nonlinear two dimensional fuzzy filter

500

FPGA Implementation of a Novel Algorithm for on-line Bar Breakage Detection on Induction Motors

501

FPGA Implementation of a Novel Compensation Technique for EER Amplifiers

502

FPGA implementation of a novel far-field sound localization system

503

FPGA Implementation of a Novel Receiver Diversity Combining Technique for Wireless SIMO Systems

504

FPGA implementation of a one-way hash function utilizing HL11-1111 nonlinear digital to analog converter

505

FPGA implementation of a parameterized Fourier synthesizer

506

FPGA implementation of a people counter for an ultra-low-power Wireless Camera Network node

507

FPGA Implementation of a Phase Locked Loop Based on Random Sampling

508

FPGA implementation of a phased array DBF using a latch method

509

FPGA implementation of a phased array DBF using polyphase filters

510

FPGA implementation of a pipelined 2D-DCT and simplified quantization for real-time applications

511

FPGA implementation of a predictive control for a PMSM with variable switching frequency

512

FPGA Implementation of a Predictive Vector Quantization Image Compression Algorithm for Image Sensor Applications

513

FPGA implementation of a probabilistic neural network for a bioelectric human interface

514

FPGA Implementation of a Probabilistic Neural Network for Spike Sorting

515

FPGA Implementation of a Probabilistic Neural Network Using Delta-Sigma Modulation for Pattern Discrimination of EMG Signals

516

FPGA implementation of a prototype PI Feedback control system for the LANSCE accelerator

517

FPGA implementation of a pulse density neural network using simultaneous perturbation

518

FPGA implementation of a pulse density neural network with learning ability using simultaneous perturbation

519

FPGA Implementation of a PWM for a Three-Phase DC–AC Multilevel Active-Clamped Converter

520

FPGA Implementation of a Real Time Maximum Likelihood Space-Time Decoder on a MIMO Software Radio Test Platform

521

FPGA implementation of a real-time image tracking system

522

FPGA Implementation of a Real-Time NARMA-Based Digital Adaptive Predistorter

523

FPGA implementation of a re-configurable FFT for multi-standard systems in software radio context

524

FPGA implementation of a re-configurable fft for multi-standard systems in software radio context

525

FPGA implementation of a reconfigurable image encryption system

526

FPGA implementation of a reconfigurable microprocessor

527

FPGA implementation of a reconfigurable SPIHT coprocessor

528

FPGA implementation of a reconfigurable Viterbi decoder for WiMAX receiver

529

FPGA implementation of a recurrent neural fuzzy network for on-line temperature control

530

FPGA Implementation of a Recursive Rank One Updating Matrix Inversion Algorithm for Constrained MPC

531

FPGA Implementation of a Reed-Solomon CODEC for OTN G.709 Standard with Reduced Decoder Area

532

FPGA Implementation of a Ridge Extraction Fingerprint Algorithm Based on Microblaze and Hardware Coprocessor

533

FPGA implementation of a same-frequency cellular repeater using adaptive feedback cancellation

534

FPGA implementation of a scalable shared buffer ATM switch

535

FPGA implementation of a scheduler supporting parallel dataflow execution

536

FPGA implementation of a second-order convolutive blind signal separation algorithm

537

FPGA implementation of a self-organized map with on-chip learning

538

FPGA implementation of a sensorless PMSM drive control algorithm based on algebraic method

539

FPGA implementation of a sequence separation algorithm based on a generalized delayed signal cancelation method

540

FPGA implementation of a sequential Extended Kalman Filter algorithm applied to mobile robotics localization problem

541

FPGA implementation of a sigma-delta (Σ-Δ) architecture based digital I-F stage for software radio

542

FPGA implementation of a signal synthesizer for driving a high-power electrostatic motor

543

FPGA implementation of a SIMD-based array processor with torus interconnect

544

FPGA Implementation of a Simple Approach for Jitter Minimisation in Ethernet for Real-time Control Communication

545

FPGA implementation of a Single Pass Connected Components Algorithm

546

FPGA implementation of a single-channel HDLC Layer-2 protocol transmitter using VHDL

547

FPGA Implementation of a Single-Input Fuzzy Logic Controller for Boost Converter With the Absence of an External Analog-to-Digital Converter

548

FPGA Implementation of a Single-Precision Floating-Point Multiply-Accumulator with Single-Cycle Accumulation

549

FPGA implementation of a sinusoidal PWM generator with zero sequence insertion

550

FPGA implementation of a smart home lighting control system

551

FPGA implementation of a space-time trellis decoder

552

FPGA implementation of a speed controller for three phase induction machines based on the inversion of the electromagnetic field

553

FPGA implementation of a spiking neural network for pattern matching

554

FPGA Implementation of a Statically Reconfigurable Java Environment for Embedded Systems

555

FPGA implementation of a stereo matching processor based on window-parallel-and-pixel-parallel architecture

556

FPGA implementation of a strong Reversi player

557

FPGA implementation of a subspace tracker based on a recursive unitary ESPRIT algorithm

558

FPGA Implementation of a Support Vector Machine Based Classification System and Its Potential Application in Smart Grid

559

FPGA implementation of a support vector machine for classification and regression

560

FPGA Implementation of a Switching Frequency Modulation Circuit for EMI Reduction in Resonant Inverters for Induction Heating Appliances

561

FPGA implementation of a synchronous and self-timed neuroprocessor

562

FPGA implementation of a synchronous motor real-time emulator based on delta operator

563

FPGA implementation of a three-level power amplifier for magnetic bearings

564

FPGA Implementation of a Three-Phase PLL and a Space Vector Modulator of a Matrix Converter for Future Electric Vehicles

565

FPGA implementation of a three-way asynchronous DDR2 memory controller

566

FPGA implementation of a Time Domain Reflectometry (TDR) system for slope monitoring applications

567

FPGA implementation of a traffic light system: Self adaptive with disruptions indicator

568

FPGA implementation of a tunable band-pass filter using the "basic heterodyne block"

569

FPGA implementation of a UMTS turbo coder/decoder

570

FPGA Implementation of a Unidirectional Systolic Array Generator for Matrix-Vector Multiplication

571

FPGA implementation of a variable step-size affine projection algorithm for acoustic echo cancellation

572

FPGA implementation of a vehicle detection algorithm using three-dimensional information

573

FPGA implementation of a video-rate fluorescence lifetime imaging system with a 32×32 CMOS single-photon avalanche diode array

574

FPGA Implementation of a Wireless Modem Suitable for Digital Satellite News Gathering

575

FPGA Implementation of Abundance Estimation for Spectral Unmixing of Hyperspectral Data Using the Image Space Reconstruction Algorithm

576

FPGA implementation of acoustic echo cancelling

577

FPGA implementation of AdaBoost algorithm for detection of face biometrics

578

FPGA Implementation of ADALINE-Based Speed Controller in a Two-Mass System

579

FPGA Implementation of Adaptive Baseband Predistortion for FET-Based Wireless Power Amplifiers

580

FPGA Implementation of Adaptive Digital Predistorter With Fast Convergence Rate and Low Complexity for Multi-Channel Transmitters

581

FPGA implementation of Adaptive filter for Noise Cancellation

582

FPGA Implementation of Adaptive Filters based on GSFAP using Log Arithmetic

583

FPGA implementation of adaptive heterodyne filters

584

FPGA implementation of adaptive IIR filters with particle swarm optimization algorithm

585

FPGA Implementation of Adaptive Mode PAPR Reduction for Cognitive Radio Applications

586

FPGA implementation of adaptive segmentation for non-stationary biomedical signals

587

FPGA implementation of adaptive temporal Kalman filter for real time video filtering

588

FPGA implementation of addition as a part of the convolution

589

FPGA implementation of Addition/Subtraction module for double precision floating point numbers using Verilog

590

FPGA Implementation of Adjustable Wideband Fractional Delay FIR Filters

591

FPGA implementation of advanced health care system using Zig-Bee enabled RFID technology

592

FPGA implementation of AES algorithm

593

FPGA implementation of AES algorithm using Composite Field Arithmetic

594

FPGA implementation of AES encryption and decryption

595

FPGA implementation of AES-based crypto processor

596

FPGA implementation of affine projection adaptive filter using coordinate descent iterations

597

FPGA implementation of Alamouti MIMO log-likelihood ratio selection for receiver-antenna selection combining

598

FPGA implementation of all-digital adaptive delta sigma Modulator with enhanced SQNR and dynamic range

599

FPGA implementation of alterable parameters RSA public-key cryptographic coprocessor

600

FPGA implementation of an 8-bit AES architecture: A pipelined and masked approach

601

FPGA implementation of an 8-bit AES architecture: A rolled and masked S-Box approach

602

FPGA Implementation of an 8-bit Simple Processor

603

FPGA implementation of an acoustic echo canceller using a VSS-NLMS algorithm

604

FPGA Implementation of an Adaptive Filter Robust to Impulsive Noise: Two Approaches

605

FPGA implementation of an adaptive fuzzy logic controller for PMSM

606

FPGA implementation of an adaptive genetic algorithm

607

FPGA implementation of an adaptive IRFOC for the induction motor

608

FPGA implementation of an adaptive modulation method for a three-phase grid-tied PV CHB inverter

609

FPGA Implementation of an Adaptive Noise Canceller

610

FPGA Implementation of an Adaptive Noise Canceller for Robust Speech Enhancement Interfaces

611

FPGA implementation of an adaptive noise canceller with low signal distortion

612

FPGA implementation of an advanced encoding and decoding architecture of polar codes

613

FPGA implementation of an all-digital T/2-spaced QPSK receiver with Farrow interpolation timing synchronizer and recursive Costas loop

614

FPGA implementation of an ANN for detection of anthelmintics resistant nematodes in sheep flocks

615

FPGA implementation of an area-time efficient FIR filter core using a self-clocked approach

616

FPGA Implementation of an ASIP for high throughput DFT/DCT 1D/2D engine

617

FPGA implementation of an associative content addressable memory

618

FPGA Implementation of an Asynchronous Processor with Both Online and Offline Testing Capabilities

619

FPGA implementation of an ATM traffic classifier for quality of service management

620

FPGA implementation of an augmented reality application for visually impaired people

621

FPGA implementation of an automobile pollution control system using a MEMS accelerometer

622

FPGA implementation of an efficient 2D 5/3 Lift DWT based invisible watermarking technique

623

FPGA Implementation of an Efficient 3D-WT Temporal Decomposition Algorithm for Video Compression

624

FPGA implementation of an efficient adaptive predistortion algorithm

625

FPGA Implementation of an Efficient Algorithm for the Calculation of Charged Particle Trajectories in Cosmic Ray Detectors

626

FPGA implementation of an efficient and highly secure cryptoprocessor over Barreto-Naehrig curves

627

FPGA implementation of an efficient cascaded integrator comb filter for narrow and wideband designs

628

FPGA Implementation of an Efficient Correlator for Complementary Sets of Sequences

629

FPGA implementation of an efficient high-throughput sphere decoder for MIMO systems based on the smallest singular value threshold

630

FPGA implementation of an efficient montgomery multiplier for adaptive filtering application

631

FPGA implementation of an efficient multiplier over finite fields GF(2/sup m/)

632

FPGA implementation of an efficient partial volume interpolation for medical image registration

633

FPGA implementation of an efficient proportionate affine projection algorithm for echo cancellation

634

FPGA implementation of an elliptic curve based integrated system for encryption and authentication

635

FPGA Implementation of an Elliptic Curve Cryptosystem over GF(3^m)

636

FPGA Implementation of an Elliptic Curve Processor Using the GLV Method

637

FPGA Implementation of an Embedded Robust Adaptive Controller for Autonomous Omnidirectional Mobile Platform

638

FPGA implementation of an emulator for Wireless Sensor Node with Pt100 temperature sensor

639

FPGA implementation of an evolutionary algorithm based charge management for electric vehicles

640

FPGA Implementation of an Evolutionary Algorithm for Autonomous Unmanned Aerial Vehicle On-Board Path Planning

641

FPGA implementation of an excitatory and inhibitory connectionist model for motion perception

642

FPGA implementation of an IF transceiver for OFDM-based WLAN

643

FPGA implementation of an IIR temporal filtering technique for real-time stimulus artifact rejection

644

FPGA implementation of an image recognition system based on Tiny Neural networks and on-line reconfiguration

645

FPGA implementation of an image segmentation algorithm using logarithmic arithmetic

646

FPGA implementation of an improved channel estimation algorithm for mobile WiMAX

647

FPGA implementation of an integer MIPS processor in Handel-C and its application to human face detection

648

FPGA implementation of an intelligent current dq PI controller for FOC PMSM drive

649

FPGA implementation of an interior point method for high-speed model predictive control

650

FPGA implementation of an interior point solver for linear model predictive control

651

FPGA Implementation of an Interpolation Processor for Soft-Decision Decoding of Reed-Solomon Codes

652

FPGA implementation of an invasive computing architecture

653

FPGA Implementation of an Iterative Receiver for MIMO-OFDM Systems

654

FPGA implementation of an LMS-based real-time adaptive Predistorter for Power Amplifiers

655

FPGA implementation of an MLSE equalizer in 10Gb/s optical links

656

FPGA implementation of an observer for state of charge estimation in lithium-polymer batteries

657

FPGA implementation of an OFDM baseband transmitter

658

FPGA implementation of an OFDM modem

659

FPGA implementation of an OFDM PHY

660

FPGA implementation of an OFDM-WLAN synchronizer

661

FPGA Implementation of an Optimal IGBT Gate Driver Based on Posicast Control

662

FPGA implementation of an optimized 8-bit AES architecture: A masked S-Box and pipelined approach

663

FPGA Implementation of an Optimized Coefficients Pulse Shaping FIR Filters

664

FPGA implementation of an ultra-high speed ADC interface

665

FPGA implementation of an universal space vector modulator

666

FPGA implementation of ANN for reactive routing protocols in MANET

667

FPGA Implementation of AODV Routing Protocol in MANET

668

FPGA implementation of artificial neural networks: an application on medical expert systems

669

FPGA Implementation of Artificial Neurons: Comparison study

670

FPGA implementation of asynchronous controllers from generalized multi-burst graph specification

671

FPGA implementation of Augmented Hammerstein predistorters for RF power amplifier linearization

672

FPGA implementation of authenticated encryption algorithm Minalpher

673

FPGA implementation of autocorrelation-based feature detector for cognitive radio

674

FPGA implementation of automatic modulation recognition system for advanced SATCOM system

675

FPGA implementation of automatic speech recognition system in a car environment

676

FPGA Implementation of Automotive Transmission Simulation

677

FPGA implementation of back projection algorithm for radar imaging

678

FPGA Implementation of Base-N Logarithm

679

FPGA Implementation of BASK-BFSK-BPSK Digital Modulators [Testing Ourselves]

680

FPGA implementation of Bayesian network inference for an embedded diagnosis

681

FPGA implementation of Bayesian neural networks for a stand-alone predictor of pollutants concentration in the air

682

FPGA implementation of BCH decoder for memory systems

683

Fpga implementation of beamforming algorithm for terrestrial radar application

684

FPGA Implementation of Beamforming Receivers Based on MRC and NC-LMS for DS-CDMA System

685

FPGA implementation of bidirectional associative memory using simultaneous perturbation

686

FPGA implementation of bidirectional associative memory via simultaneous perturbation rule

687

FPGA implementation of bilinear interpolation algorithm for CFA demosaicing

688

FPGA implementation of binary coded decimal digit adders and multipliers

689

FPGA implementation of biologically-inspired auto-associative memory

690

FPGA implementation of bit timing logic of CAN controller

691

FPGA implementation of blind adaptive decision feedback equalizer

692

FPGA implementation of blob detection algorithm for object detection in visual navigation

693

FPGA Implementation of Blob Recognition

694

FPGA implementation of block truncation coding algorithm for gray scale and color images

695

FPGA implementation of block truncation coding algorithm for gray scale images

696

FPGA implementation of Blokus Duo player using hardware/software co-design

697

FPGA implementation of BP-DF-MPIC detectors for DS-CDMA systems in frequency selective channels

698

FPGA implementation of BPSK modem for telemetry systems operating in noisy environments

699

FPGA implementation of camera tamper detection in real-time

700

FPGA implementation of CCSDS BCH (63, 56) for satellite communication

701

FPGA implementation of CDMA trans-receiver

702

FPGA implementation of cellular automata based encryption algorithm for internet communications

703

FPGA Implementation of Cellular Automata Spaces Using a CAM Based Cellular Architecture

704

FPGA implementation of channel estimation for MIMO-OFDM

705

FPGA implementation of chaotic based AES image encryption algorithm

706

FPGA implementation of chaotic cellular automaton with binary synchronization property

707

FPGA implementation of chaotic pseudo-random bit generators

708

FPGA implementation of chaotic state sequence generator for secure communication

709

FPGA implementation of CIS speech processing strategy for Cochlear Implants

710

FPGA implementation of closed-loop control system for small-scale robot

711

FPGA Implementation of Closed-loop Control System for Small-sized RoboCup

712

FPGA Implementation of Cluster Formation Algorithms in Mobile Ad-hoc Networks

713

FPGA implementation of CMF for embedded palm biometric system

714

FPGA implementation of comb-based decimation filter with improved frequency characteristic for SD A/D converters application

715

FPGA implementation of compact S-Box for AES algorithm using composite field arithmetic

716

FPGA implementation of compressive sampling for sensor network applications

717

FPGA implementation of configurable three-Phase SPWM module

718

FPGA implementation of constrained LMS algorithm

719

FPGA Implementation of contactless position sensor using FSR (Force sensing Resistor)

720

FPGA implementation of content addressable memory based information detection system

721

FPGA Implementation of Content-Based Music Retrieval Systems

722

FPGA implementation of contrast stretching for image enhancement using system generator

723

FPGA implementation of controller-datapath pair in custom image processor design

724

FPGA implementation of cooperative spectrum sensing for Cognitive Radio networks

725

FPGA implementation of CORDIC algorithms for sine and cosine generator

726

FPGA Implementation of CORDIC-Based Square Root Operation for Parameter Extraction of Digital Pre-Distortion for Power Amplifiers

727

FPGA implementation of correlation and ML channel estimation for long code CDMA systems

728

FPGA implementation of CPFSK modulation techniques for HF data communication

729

FPGA Implementation of CPS-SPWM for Grid Connected Photovoltaic System

730

FPGA implementation of CubeHash, Gr⊘stel, JH, and SHAvite-3 hash functions

731

FPGA implementation of cubic spline interpolation method for empirical mode decomposition

732

FPGA implementation of Data Encryption Standard using time variable permutations

733

FPGA implementation of data fusion algorithm for object localization

734

FPGA implementation of data hididng in grayscale imagesusing neighbour mean interpolation

735

FPGA Implementation of DCD Based CDMA Multiuser Detector

736

FPGA implementation of decimal processors for hardware acceleration

737

FPGA implementation of delay optimized single precision floating point multiplier

738

FPGA implementation of Delta Sigma Modulation based all-digital RF transmitter for parallel magnetic resonance imaging

739

FPGA implementation of Differential Evaluation Algorithm for MLP training

740

FPGA Implementation of Diffusive Realization for a Distributed Control Operator

741

FPGA implementation of digital controller for active power line conditioner using SRF theory

742

FPGA implementation of digital controller for DC-DC buck converter

743

FPGA implementation of digital differentiator using Richardson extrapolation and high sampling rate acting like fractional delay

744

FPGA implementation of digital filters synthesized using the frequency-response masking technique

745

FPGA implementation of digital IF processing in HFGWR

746

FPGA implementation of digital local oscillator for digital stretch processing

747

FPGA implementation of digital modulation techniques

748

FPGA implementation of digital timing recovery in software radio receiver

749

FPGA implementation of digital up/down convertor for WCDMA system

750

FPGA implementation of digital upconversion using distributed arithmetic FIR filters

751

FPGA Implementation of direct Rotor Field Oriented Control for Induction Motor

752

FPGA implementation of direct torque control of induction motor

753

FPGA implementation of direct torque control of induction motor with reduced ripples in torque and flux

754

FPGA Implementation of Discrete Fourier Transform Core Using NEDA

755

FPGA implementation of discrete fractional Fourier transform

756

FPGA implementation of Discrete Wavelet Transform using Distributed Arithmetic Architecture

757

FPGA implementation of dispatching algorithms for Local Control of Elevator Systems

758

FPGA implementation of downlink DBF calibration

759

FPGA Implementation of DSDV Based Router in Mobile Adhoc Network

760

FPGA implementation of Dsss RF front-end based on software radio

761

FPGA implementation of DSSS-CDMA transmitter and receiver for ADHOC networks

762

FPGA implementation of DSVPWM modulator

763

FPGA Implementation of DTC Control Method for the Induction Motor Drive

764

FPGA implementation of dual key based AES encryption with key Based S-Box generation

765

FPGA implementation of dynamic key management for DES encryption algorithm

766

FPGA implementation of dynamic run-time behavior reconfiguration in robots

767

FPGA Implementation of Dynamic Threshold Sphere Detection for MIMO Systems

768

FPGA implementation of dynamically tunable filters

769

FPGA implementation of E1 Time Space Time switch

770

FPGA implementation of ECMA-368 BP Merge protocol

771

FPGA implementation of edge detection using Canny algorithm

772

FPGA implementation of efficient AES encryption

773

FPGA Implementation of efficient FFT algorithm based on complex sequence

774

FPGA implementation of efficient FIR Filter with quantized fixedpoint coefficients

775

FPGA implementation of efficient Kalman band-pass sigma-delta filter for application in FM demodulation

776

FPGA implementation of efficient vedic multiplier

777

FPGA implementation of Elementary Generalized Unitary Rotation

778

FPGA implementation of elementary generalized unitary rotation with CORDIC based architecture

779

FPGA implementation of elementary motion detectors for the visual guidance of micro-air-vehicles

780

FPGA Implementation of EM Algorithm for 3D CT Reconstruction

781

FPGA Implementation of Embedded Cruise Control and Anti-Collision Radar

782

FPGA Implementation of Embedded Fuzzy Controllers for Robotic Applications

783

FPGA Implementation of Encoder for (15, k) Binary BCH Code Using VHDL and Performance Comparison for Multiple Error Correction Control

784

FPGA implementation of encrypted controller

785

FPGA implementation of energy efficient multiplication over GF(2^m) for ECC

786

FPGA implementation of enhanced key expansion algorithm for Advanced Encryption Standard

787

FPGA Implementation of Evolvable Block-based Neural Networks

788

FPGA Implementation of Expandable RSA Pubic-Key Cryptographic Coprocessor

789

FPGA implementation of extended Kalman filter for speed-sensorless control of induction motors

790

FPGA implementation of extended reconfigurable Binary Edwards Curve based processor

791

FPGA implementation of fast adder

792

FPGA implementation of fast adders using Quaternary Signed Digit number system

793

FPGA implementation of fast and area efficient CORDIC algorithm

794

FPGA implementation of Fast Block LMS adaptive filter using Distributed Arithmetic for high throughput

795

FPGA implementation of fast FIR low pass filter for EMG removal from ECG signal

796

FPGA implementation of Fast Fourier Transform

797

FPGA implementation of fast QR decomposition based on givens rotation

798

FPGA implementation of fast radix 4 division algorithm

799

FPGA implementation of fast serial 64-points FFT/IFFT block without reordering block

800

FPGA Implementation of FastICA based on Floating-Point Arithmetic Design for Real-Time Blind Source Separation

801

FPGA implementation of feature extraction algorithm for speaker verification

802

FPGA Implementation of Feature Extraction and MLP Neural Network Classifier for Farsi Handwritten Digit Recognition

803

FPGA implementation of feature extraction for colorectal endoscopic images with NBI magnification

804

FPGA implementation of Feed-Forward Neural Networks for smart devices development

805

FPGA implementation of FFT blocks for OFDM

806

FPGA implementation of FFT processor using vedic algorithm

807

FPGA implementation Of FFT processor with OFDM transceiver

808

FPGA implementation of FHSS-FSK modulator

809

FPGA Implementation of Fingerprint Recognition System using Adaptive Threshold Technique

810

FPGA implementation of FIR filter using M-bit parallel distributed arithmetic

811

FPGA implementation of FIR filter with smallest processor

812

FPGA implementation of FIR filters using pipelined bit-serial canonical signed digit multipliers

813

FPGA Implementation of FIR Nyquist Filters

814

FPGA implementation of fixed and variable frequency ADALINE schemes for grid-connected VSI synchronization

815

FPGA implementation of fixed point CORDIC-SVD for E-skin systems

816

FPGA implementation of FlexRay protocol with built-in-self-test capability

817

FPGA implementation of floating-point complex matrix inversion based on GAUSS-JORDAN elimination

818

FPGA implementation of floatingpoint rotation mode CORDIC algorithm

819

FPGA implementation of four-step genetic search algorithm

820

FPGA implementation of frame synchronization and symbol timing synchronization based on OFDM system for IEEE 802.11a

821

FPGA Implementation of Frame Synchronization in Burst OFDM Communication Based on IEEE802.11a

822

FPGA Implementation of frequency dividers in vocational education

823

FPGA implementation of Frequency Domain Equalizer with time domain channel estimation for millimetre-wave OFDM system

824

FPGA Implementation of Frequency Output and Input Using Handel-C

825

FPGA implementation of full HD real-time depth estimation

826

FPGA Implementation of Full Parallel and Pipelined FFT

827

FPGA implementation of fully parallel distributed arithmetic based DCT architecture

828

FPGA implementation of fully parallel fast MDCT algorithm

829

FPGA implementation of fully pipelined Advanced Encryption Standard

830

FPGA implementation of fuzzy color correction system

831

FPGA implementation of fuzzy logic elevator group controller with traffic based system

832

FPGA implementation of fuzzy wall-following control

833

FPGA Implementation of Gated Clock based Globally Asynchronous Locally Synchronous Wrapper Circuits

834

FPGA implementation of Gaussian noise generator

835

FPGA implementation of Gaussian-distributed pseudo-random number generator

836

FPGA implementation of general purpose real time controller-applied to flying shears in hot rolling mills

837

FPGA Implementation of Generalized Fuzzy Operations

838

FPGA implementation of generalized modulation for hybrid multilevel inverter with fixed ratio DC link voltage

839

FPGA implementation of genetic algorithm for dynamic filter-bank-based multicarrier systems

840

FPGA implementation of Genetic Algorithms for frequency estimation in power systems

841

FPGA implementation of GF (P^m) exponentiation for digital signature and authentication scheme

842

FPGA implementation of graph cut based image thresholding

843

FPGA implementation of grid synchronization algorithms based on DSC, DSOGI_QSG and PLL for distributed power generation systems

844

FPGA implementation of GZIP compression and decompression for IDC services

845

FPGA implementation of hardware countermeasures

846

FPGA implementation of hardware processing modules as coprocessors in brain-machine interfaces

847

FPGA implementation of hardware voter

848

FPGA implementation of harmonic detection methods using Neural Networks

849

FPGA implementation of harmonic detector based on Second Order Generalized Integrators

850

FPGA implementation of heterogeneous multicore platform with SIMD/MIMD custom accelerators

851

FPGA implementation of hiding information using cryptographic key

852

FPGA implementation of hierarchical clustering algorithms

853

FPGA implementation of Hierarchical Enumerative Coding for locally stationary image source

854

FPGA implementation of hierarchical memory architecture for network processors

855

FPGA implementation of high gain observer for induction machine using Simulink HDL coder

856

FPGA implementation of high performance Fast Page Mode dynamic random access memory

857

FPGA implementation of high performance FIR filters

858

FPGA Implementation of High Performance LDPC Decoder Using Modified 2-Bit Min-Sum Algorithm

859

FPGA implementation of high sampling rate in-car non-stationary noise cancellation based on adaptive Wiener filter

860

FPGA implementation of high speed 8-bit Vedic multiplier using barrel shifter

861

FPGA Implementation of High Speed FFT Algorithm Based on Split-Radix

862

FPGA Implementation of High Speed FIR Filters Using Add and Shift Method

863

FPGA Implementation of High Speed Latency Optimized Optical Communication System Based on Orthogonal Concatenated Code

864

FPGA implementation of high speed multiplier using higher order compressors

865

FPGA implementation of high speed multiplierless frequency response masking FIR filters

866

FPGA implementation of high speed parallel architecture for block motion estimation

867

FPGA implementation of high speed scalar multiplication for ECC in GF(p)

868

FPGA implementation of high speed serial peripheral interface for motion controller

869

FPGA implementation of high speed Vedic multiplier using CSLA for parallel FIR architecture

870

FPGA Implementation of High Speed VLSI Architectures for AES Algorithm

871

FPGA implementation of high speed XTS-AES for data storage devices

872

FPGA implementation of high-frequency software radio receiver

873

FPGA Implementation of High-Performance PHM / DPHM Schedulers

874

FPGA implementation of high-speed parallel maximum a posteriori (MAP) decoders

875

FPGA Implementation of High-Throughput Complex Adaptive Equalizer for QAM Receiver

876

FPGA implementation of HIHO and SIHO decoders for DSC codes

877

FPGA implementation of Hilbert transform via radix-2² pipelined FFT processor

878

FPGA implementation of Hilbert transformer based on lattice wave digital filters

879

FPGA implementation of HOG based pedestrian detector

880

FPGA implementation of Hopfield neural network via simultaneous perturbation rule

881

FPGA implementation of hot spot detection in Infrared video

882

FPGA implementation of human emotion reasoning engine

883

FPGA Implementation of Hybrid Additive Programmable Cellular Automata Encryption Algorithm

884

FPGA implementation of hybrid fixed point - Floating point multiplication

885

FPGA implementation of hybrid Han-Carlson adder

886

FPGA implementation of I²C & SPI protocols: A comparative study

887

FPGA implementation of ICA algorithm for adaptive noise canceling

888

FPGA implementation of ICA algorithm for blind signal separation and adaptive noise canceling

889

FPGA implementation of IEEE 802.15.3c receiver

890

FPGA implementation of IEEE-754 floating point Karatsuba multiplier

891

FPGA Implementation of Image Compression using DPCM and FBAR

892

FPGA implementation of image enhancement algorithms

893

FPGA implementation of image rotation using modified compensated CORDIC

894

FPGA Implementation of Image Segmentation Processor

895

FPGA implementation of image watermarking algorithm for a digital camera

896

FPGA Implementation of Infomax BSS Algorithm with Fixed-Point Number Representation

897

FPGA implementation of integer wavelet transform

898

FPGA implementation of interpolation techniques for thermistor linearization

899

FPGA implementation of IS-95 CDMA baseband filter

900

FPGA implementation of isolated digit recognition system using modified back propagation algorithm

901

FPGA Implementation of Isotropic and Nonisotropic Fading Channels

902

FPGA implementation of Itoh-Tsujii inversion algorithm

903

FPGA Implementation of Izhikevich Spiking Neural Networks for Character Recognition

904

FPGA implementation of JADE ICA algorithm

905

FPGA implementation of joint CFO and IQ-imbalance compensator for narrow-band wireless system

906

FPGA Implementation of Joint Spatio-Temporal Spectrum Sensing Algorithm Based on Direct Localization Method

907

FPGA implementation of JPEG-LS compression algorithm for real time applications

908

FPGA implementation of JPEG-LS compression algorithm for real time applications

909

FPGA implementation of Kalman low-pass filter for applications in sigma-delta (Σ-Δ) demodulation

910

FPGA implementation of K-means algorithm for bioinformatics application: An accelerated approach to clustering Microarray data

911

FPGA implementation of large-scale matrix inversion using single, double and custom floating-point precision

912

FPGA Implementation of LDPC Decoders Based on Joint Row-column Decoding Algorithm

913

FPGA implementation of LDPC encoder with approximate lower triangular matrix

914

FPGA implementation of learning for online system identification

915

FPGA implementation of learning rate supervisory loop for neural network based adaptive control of a flexible joint

916

FPGA implementation of less area overhead radix — 4 Threshold Viterbi decoder with trace forwarding for OFDM based cognitive radio

917

FPGA implementation of LMS adaptive filter

918

FPGA Implementation of LMS and N-LMS Processor for Adaptive Array Applications

919

FPGA implementation of LMS self correcting adaptive filter (SCAF) and hardware analysis

920

FPGA implementation of LMS-based FIR adaptive filter for real time digital signal processing applications

921

FPGA implementation of local contrast method for infrared small target detection

922

FPGA Implementation of Log-polar Mapping

923

FPGA implementation of lookup algorithms

924

FPGA implementation of low area and delay efficient Adaptive Filter using Distributed Arithmetic

925

FPGA implementation of low bandwidth ECC code

926

FPGA implementation of low complexity crest factor reduction in OFDM systems

927

FPGA implementation of low latency routing algorithm for 3D Network on Chip

928

FPGA implementation of low latency scalable Elliptic Curve Cryptosystem processor in GF(2^m)

929

FPGA Implementation of Low Phase Noise Oscillator

930

FPGA Implementation of low power 64-point radix-4 FFT processor for OFDM system

931

FPGA implementation of Low Power High Speed square root circuits

932

FPGA Implementation of Low Power Parallel Multiplier

933

FPGA implementation of low-frequency GPR signal algorithm using frequency stepped chirp signals in the time domain

934

FPGA implementation of low-power 3D ultrasound beamformer

935

FPGA implementation of low-power and high-PSNR DCT/IDCT architecture based on adaptive recoding CORDIC

936

FPGA implementation of low-power split-radix FFT processors

937

FPGA implementation of low-profile wake-up radio receiver for Wireless Sensor Networks

938

FPGA Implementation of Mac Based Stream Cipher-Phelix

939

FPGA implementation of marginalized particle filter for sensorless control of PMSM drives

940

FPGA Implementation of Matrix Inversion Using QRD-RLS Algorithm

941

FPGA implementation of MD5 hash algorithm

942

FPGA implementation of median filter

943

FPGA implementation of MFNN for image registration

944

FPGA Implementation of MIMO OFDM Eigenbeam-Space Division Multiplexing Systems for Future Wireless Communications Networks

945

FPGA implementation of MIMO-OFDM STBC systems

946

FPGA implementation of MIMO-OFDM transceiver

947

FPGA implementation of mixed integer quadratic programming solver for mobile robot control

948

FPGA implementation of MMSE adaptive array antenna using RLS algorithm

949

FPGA implementation of MMSE metric based efficient near-ML detection

950

FPGA Implementation of Model Predictive Control With Constant Switching Frequency for PMSM Drives

951

FPGA implementation of modern wireless communication system

952

FPGA implementation of modified architecture for adaptive Viterbi decoder

953

FPGA implementation of modified decomposition filter

954

FPGA implementation of modified fractional wavelet transforms

955

FPGA implementation of modified leaky least mean square channel estimation algorithm

956

FPGA implementation of modified radix 2 SRT division algorithm

957

FPGA implementation of modified serial montgomery modular multiplication for 2048-bit RSA cryptosystems

958

FPGA implementation of modified type-C PID control system

959

FPGA implementation of modular architecture for packet classification using field split algorithm

960

FPGA Implementation of Modulo (231-1) Adder

961

FPGA implementation of mono and stereo inverse perspective mapping for obstacle detection

962

FPGA implementation of Morlet continuous wavelet transform for EEG analysis

963

FPGA implementation of moving object detection in frames by using background subtraction algorithm

964

FPGA implementation of MPIC detectors for DS-CDMA systems in frequency nonselective channels

965

FPGA Implementation of MPPT Using Variable Step-Size P&O Algorithm for PV Applications

966

FPGA Implementation of M-PSK Modulators for Satellite Communication

967

FPGA implementation of multi parameter deinterleaving

968

FPGA implementation of multilayer feed forward neural network architecture using VHDL

969

FPGA implementation of multiple hardware watchdog timers for enhancing real-time systems security

970

FPGA implementation of multiple Pursuit-Evasion games with decentralized Learning Automata

971

FPGA implementation of multiplication algorithms for ECC

972

FPGA implementation of multiplication-free complex division

973

FPGA implementation of multiplier less matched filters to transmit video signals over satellites

974

FPGA implementation of multiplierless M-QAM modulator

975

FPGA implementation of multipliers for ECC

976

FPGA implementation of multiprocessor core Architecture for Embedded Concurrent Computing

977

FPGA implementation of multi-valued "and/or"-neural network

978

FPGA implementation of Naive Bayes classifier for visual object recognition

979

FPGA implementation of network on chip based on Pentacle topology

980

FPGA implementation of network on chip framework using HDL

981

FPGA implementation of neural network as processing element in ice detector

982

FPGA Implementation of Neural Network Based Adaptive Control of a Flexible Joint with Hard Nonlinearities

983

FPGA implementation of neural network classifier for partial discharge time resolved data from magnetic probe

984

FPGA implementation of neural network for linearization of thermistor characteristics

985

FPGA implementation of neural network-based controllers for power electronics applications

986

FPGA Implementation of Neural Nonlinear ADC-based Temperature Measurement System

987

FPGA implementation of new real-time image encryption based switching chaotic systems

988

FPGA implementation of new standard hash function Keccak

989

FPGA Implementation of Noise Whitening Algorithm for Wireless MIMO Communication Systems

990

FPGA implementation of nonbinary quasi-cyclic LDPC decoder based on EMS algorithm

991

FPGA implementation of non-iterative ICA for detecting motion in image sequences

992

FPGA implementation of nonlinear control on hard disk drive

993

FPGA implementation of nonlinear model predictive control

994

FPGA implementation of novel fast confluence adaptive independent component analysis for mixture of sub and supergaussian signal

995

FPGA implementation of novel peak-to-average power ratio reduction in orthogonal frequency division multiplexing systems

996

FPGA Implementation of OFDM Transceiver for a 60GHz Wireless Mobile Radio System

997

FPGA implementation of one-unit fixed-point ICA-R algorithm

998

FPGA implementation of online finite-set model based predictive control for power electronics

999

FPGA Implementation of Optical Flow Algorithm Based on Cost Aggregation

1000

FPGA implementation of optimal and approximate model predictive control for a buck-boost DC-DC converter

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