<< مقالات لاتين فني مهندسي >>
<< بر اساس عنوان >>
1
Design method for area-efficient and uniform channel DACs
2
Design method for bandpass filter with enhanced stopband rejection using spiral SIRs
3
Design method for broadband CMOS RF LNA
4
Design method for brush permanent magnet DC motors
5
Design Method for Butter–Cheby Bandpass Filters With Even Number of Resonators
6
Design method for cam contour based on kinematics and dynamics analysis
7
Design method for cellular neural network with linear relaxation
8
Design Method for Circularly Polarized Fabry–Perot Cavity Antennas
9
Design method for CNN Gabor-type filters
10
Design method for conceptual design of by-wire control: two case studies
11
Design method for constant power consumption of differential logic circuits
12
Design method for critically coupling into a weakly absorbing 1D photonic crystal cavity
13
Design method for developing a Mobile Engineering-Application Middleware (MEAM)
14
Design method for digital recursive filter with linear phase-frequency characteristic
15
Design Method for Duffing System Based on DSP Builder
16
Design method for fine impedance matching of superturnstile antenna and characteristics of the modified batwing antenna
17
Design method for FIR-based Hilbert transform filters suitable for broadband AM-SSB
18
Design method for fully integrated CMOS RF LNA
19
Design method for harmonically-tuned, dynamic load-modulated power amplifiers
20
Design method for high reliable flip chip BGA package
21
Design Method for High-Order Sigma–Delta Modulator Stabilized by Departure Angles Designed to Keep Root Loci in Unit Circle
22
Design method for impedance matching networks
23
Design method for improving the power density applied to Fan-shape of non-rare earth spoke-type PMSM
24
Design method for interferometer array. Measurement of the elevation angle of waves in the presence of a reflecting terrain
25
Design method for L- and T-connected tapped-winding capacitor motors
26
Design method for large 2-D ultrasonic arrays with controlled grating lobes levels
27
Design method for low-power, low phase noise voltage-controlled oscillators
28
Design method for matching circuits of general multiplexers
29
Design method for monolithic analogue filters
30
Design method for monolithic DC-DC converters based on the losses optimization of the power stage
31
Design method for motion reproduction system including time scaling based on robot dynamics
32
Design method for multilateral tele-control to realize shared haptic mouse
33
Design method for multiplier-less two-variable numeric function approximation
34
Design method for neuro-fuzzy motion controllers
35
Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation
36
Design method for offset shaped dual-reflector antenna with an elliptical aperture of low cross-polarisation characteristics
37
Design method for optimal data transmission filters
38
Design method for optimal step size matrix of the affine projection algorithm using semidefinite programming
39
Design method for orientation-selective CNN filters
40
Design method for parameterized IP generator using structural and creational design patterns
41
Design method for patch antennas short circuited at one end
42
Design Method for Polygonal Spatial Filters
43
Design method for prototyping a cost-effective VR spherical motor
44
Design method for realization of open-type magnetically shielded room combined with square cylinders made of magnetic material for MRI
45
Design Method for Realization of Open-Type Magnetically Shielded Room Composed of Magnetic Square Cylinders for MRI
46
Design Method for Robust Compliant Motion for Manipulators
47
Design method for rotational uniform illumination system with LED
48
Design method for SAW resonators using natural SPUDT substrates
49
Design method for scalable discrete trigonometric transforms (DTT) with constant geometry
50
Design method for sensing body of differential pressure transmitter using silicon diaphragm-type pressure sensor
51
Design Method for Slotted Beam Springs for Insulation Displacement Contacts
52
Design method for stable second-order digital filters
53
Design method for torque estimation in stepping and switched reluctance motors
54
Design method for two-channel cyclic filter banks over fields of characteristic two
55
Design Method for UHF Class-E Power Amplifiers
56
Design Method for Ultrasound Transducers Using Experimental Data and Computers
57
Design Method for Ultra-Wideband Bandpass Filter With Wide Stopband Using Parallel-Coupled Microstrip Lines
58
Design Method for Unconventional Computing
59
Design Method for UWB Planar Antenna with Subband Rejection Capability
60
Design Method for Wideband Circularly Polarized Slot Antennas
61
Design method for wideband direct-coupled resonator filters with electric or magnetic couplings
62
Design Method of 3-D Active Silicon Neural Microelectrode Biosensor Based on MEMS Technology
63
Design method of a 1-bit digital filter using a new 2-Degree-of-Freedom control
64
Design method of a 3-phase VSI for UPS systems
65
Design method of a class of embedded combinational self-testing checkers for two-rail codes
66
Design method of a dual band balun and divider
67
Design Method of a High Field HTS Magnet Consisting of Pancake Windings Having Different Current in Each Pancake Winding
68
Design method of a magnetic-field-modulated brushless double-rotor machine used for HEVs
69
Design method of a metallic enclosure considering EMI using a 3D-FEM
70
Design method of a novel hybrid-flux magnetic gear using 3-D finite element method
71
Design method of a simplified speed observer for speed sensorless F.O. induction motor drives working at low speed in 4-quadrant mode
72
Design method of a tap feed for a very small normal-mode helical antenna
73
Design method of adaptive nonlinear H
∞
control systems via neural network approximators
74
Design method of algebraic equivalent observers for several typical kinds of controlled processes
75
Design method of an automatic machine set for TCM manufacture
76
Design Method of an EM Wave Absorber in Transparent Type for V-band Using TiO2 Resistive Films
77
Design method of an innovative motor for an intra-aortic ventricular assist device
78
Design method of an intelligent oil-hydraulic system (load sensing oil-hydraulic system)
79
Design method of analog lowpass filters with monotonic response and arbitrary flatness
80
Design method of brachiation controller based on virtual holonomic constraint
81
Design method of brachitation controller based on virtual holonomic constraint
82
Design method of Bragg grating waveguides on substrate for optical filters
83
Design method of CAN BUS network communication structure for electric vehicle
84
Design Method of Class-F Power Amplifier With Output Power of
20 dBm and Efficient Dual Supply Voltage Transmitter
85
Design method of closed loop resonator filter using parallel capacitor to reduce size
86
Design method of cross current suppression control for parallel operation system constructed with two electric power converters
87
Design method of cymbal transducer structure parameters based on finite element analysis
88
Design method of defect-tolerant WSI systems based on the residue number system
89
Design method of direct adaptive fuzzy sliding mode tracking control and application
90
Design method of discrete-time Plug-in adaptive systems for periodic disturbance compensation
91
Design method of EBG material with wide defect band
92
Design Method of Eigenvalue Assignment based on Standard Characteristic Polynomial
93
Design method of EM absorber and shielding screen using wire array sheet
94
Design method of fault diagnosis of flowmeters using historical database - Evaluation based on probabilities of false-alarm and miss-alarm -
95
Design method of filters with time-domain constraints for data communication systems
96
Design method of FIR digital filters with arbitrary passband by using interpolation techniques
97
Design method of GUI using genetic algorithm
98
Design method of heterogeneous trench-assisted graded-index few-mode multi-core fiber with low differential mode delay
99
Design method of highway traffic safety analysis model
100
Design method of input voltage robust PI controller for PV interface converter
101
Design method of limit cycle generator by hysteresis neural networks
102
Design method of long distance optical transmission equipment for S band RF TT&C signal
103
Design method of low-power photovoltaic grid-connected inverter based on XE162FN
104
Design method of lumped-element dual-band Wilkinson power dividers based on frequency transformation
105
Design method of maximally flat FIR filter in consideration of even and odd order
106
Design Method of Microactuator With Magnetic Alloy Iron-Based Amorphous Plates for Loudspeaker
107
Design method of miniaturized HTS coplanar waveguide bandpass filters using cross coupling
108
Design method of minimum-phase state decoupling control with feedforward compensation
109
Design Method of Modular Units for Articulated in-Pipe Robot Inspecting System
110
Design Method of Morphological Structural Function for Pattern Recognition of EEG Signals During Motor Imagery and Cognition
111
Design method of MTCMOS power switch for low-voltage high-speed LSIs
112
Design method of multilateral tele-control for multi-client and multi-coupled physical model server
113
Design Method of Multi-Micro-Computer Redundancy System Based on CAN Bus
114
Design method of multistage amplifiers using nichols chart
115
Design method of neural networks for limit cycle generator
116
Design method of non-circular pulleys for pneumatic-driven musculoskeletal robots that generate specific direction force by one-shot valve operations
117
Design method of NOR-type comparison circuit in CAM with ground bounce noise considerations
118
Design method of OFDM/OQAM systems using a weighted time-frequency localization criterion
119
Design method of outcome based learning for an inverter experiment in a power electronics subject
120
Design method of parameters for pulse doppler signal to nullifying the interference of negative frequency
121
Design method of PID-type model predictive iterative learning control based on the two-dimensional generalized predictive control scheme
122
Design method of product agile customization based on dynamic multi-artificial neural network models
123
Design method of relative magnitude coefficients considering rotation of basis vectors in interference space on the K-user MIMO interference channel for downlink system
124
Design method of robust Kalman filter for multi output systems based on statistics
125
Design method of robust Kalman filter via ℓ
1
regression and its application for vehicle control with outliers
126
Design Method of Robust Networks against Performance Deterioration during Failures
127
Design method of safe fly-around trajectory based on retangular keep-out-zone
128
Design method of shading coil in electromagnetic mechanism of AC contactor based on FEA
129
Design Method of Single-Flux-Quantum Logic Circuits Using Dynamically Reconfigurable Logic Gates
130
Design Method of Smallest Robust Networks Against Performance Deterioration During Failures
131
Design Method of SMES Magnet Considering Inhomogeneous Superconducting Properties of YBCO Tapes
132
Design method of stable force control system using new resonance ratio control and instantaneous state observer
133
Design method of supervision and accommodation of a machining center control
134
Design method of symmetric vector quantiser
135
Design method of the perturb and observe controller parameters for photovoltaic applications
136
Design method of transparent water lens of model turbine taper pipe based on intelligent optimization algorithm
137
Design Method of UI of AV Remote Controller Based on AHP
138
Design method of variable compliance gain for force-based compliance controller
139
Design method of viterbi decoding of convolutional code based on VHDL
140
Design method of volt/turn for minimizing life cost of a superconducting transformer
141
Design method of wide-area damping controller based on FOA algorithm
142
Design method of X band coaxial duplexer
143
Design method of Yagi-Uda two-stacked circular loop array antennas
144
Design method support for domain specific SoC design
145
Design method to modular robot system
146
Design method, analysis and prototypes of radial line slot antennas
147
Design methodolgy for HD Photo compression algorithm targeting a FPGA
148
Design methodologies and architecture solutions for high-performance interconnects
149
Design Methodologies and CAD Tool Flows for Networks on Chips
150
Design methodologies and CAD tools [VLSI]
151
Design methodologies and power setting strategies for WCDMA serial interference cancellation receivers
152
Design methodologies and programmable devices used in power electronic converters — A survey
153
Design methodologies and tools for circuit design in CMOS nanometer technologies
154
Design methodologies and tools for circuit design in CMOS nanometer technologies
155
Design methodologies based on hardware description languages
156
Design methodologies for
C
-2
C
ladder-based D/A convertors for PCM codecs
157
Design methodologies for 3D mixed signal integrated circuits: A practical 12-bit SAR ADC design case
158
Design methodologies for adaptive and multimedia networks
159
Design methodologies for consumer-use video signal processing LSIs
160
Design Methodologies for Embedded Systems: Where is the Super-Glue?
161
Design methodologies for high density domain wall memory
162
Design methodologies for high-performance noise-tolerant XOR-XNOR circuits
163
Design methodologies for high-power three-phase zero-current-transition inverters
164
Design methodologies for high-speed CMOS photoreceiver front-ends
165
Design Methodologies for Low-Power CMOS Operational Amplifiers in a 0.25μm Digital CMOS Process
166
Design methodologies for noise in digital integrated circuits
167
Design Methodologies for Nonlinear Circuit Simulation and Optimization
168
Design methodologies for optical WDM networks with awareness of transmission impairments
169
Design methodologies for partially reconfigured systems
170
Design methodologies for robust nano-positioning
171
Design methodologies for securing cyber-physical systems
172
Design methodologies for simulation translators (with a case study)
173
Design methodologies for soft switched inverters
174
Design methodologies for soft switched inverters
175
Design methodologies for system level IP
176
Design methodologies for the synthesis of high speed multiprocessor digital signal processing systems
177
Design methodologies for tolerating cell and interconnect faults in FPGAs
178
Design methodologies for VLSI
179
Design Methodologies for Yield Enhancement and Power Efficiency in SRAM-Based SoCs
180
Design methodologies impact on the embedded system performances: Case of cryptographic algorithm
181
Design methodologies of a hybrid actuation approach for a human-friendly robot
182
Design methodologies of comparators based on parallel hardware algorithms
183
Design methodologies of computers for artificial intelligence processing
184
Design methodologies of LTCC bandpass filters, diplexer, and triplexer with transmission zeros
185
Design methodologies of planar duplexers and triplexers by manipulating attenuation poles
186
Design methodologies of shop-floor communication protocols based on FDL tools
187
Design Methodologies of Transaction-Safe Cluster Allocations in TFAT File System for Embedded Storage Devices
188
Design methodologies, models and tools for very-large-scale integration of NEM relay-based circuits
189
Design methodology
190
Design methodology and advances in nested-Miller compensation
191
Design methodology and applications of SiGe BiCMOS cascode opamps with up to 37-GHz unity gain bandwidth
192
Design Methodology and Architectures to Reduce the Semiconductor Laser Phase Noise Using Electrical Feedforward Schemes
193
Design Methodology and CAD Tools for Prototyping Delta-Sigma Fractional-N Frequency Synthesizers
194
Design methodology and CAD tools for the NVAX microprocessor
195
Design methodology and characterization of a SiGe BiCMOS power amplifier for 60 GHz wireless communications
196
Design methodology and comparison of rectifiers for UHF-band RFIDs
197
Design methodology and environment for robot diagnosis
198
Design methodology and environment for the Apollo DN10000
199
Design methodology and evaluation of rate adaptation based congestion control for Vehicle Safety Communications
200
Design methodology and experimental results for new ladder-type SAW resonator coupled filters
201
Design Methodology and Experimental Verification of Serpentine/Folded-Waveguide TWTs
202
Design methodology and experimental verification of serpentine/folded-waveguide TWTs
203
Design methodology and FPGA-based controllers for Power Electronics and drive applications
204
Design methodology and integration of a 1.8GHz outphasing power amplifier for mobile terminals
205
Design methodology and manufacture of a microinductor
206
Design methodology and modeling of low inductance planar bus structures
207
Design methodology and optimization of a medium frequency transformer for high power DC-DC applications
208
Design Methodology and Optimization of Distributed MEMS Matching Networks for Low-Microwave-Frequency Applications
209
Design methodology and optimization of gate-driven NMOS ESD protection circuits in submicron CMOS processes
210
Design methodology and optimization strategy for dual-V
TH
scheme using commercially available tools
211
Design methodology and performance analysis for a novel constant envelope modulation signal of GNSS
212
Design methodology and performance estimation for complementary gallium arsenide
213
Design Methodology and Performance Evaluation of a Tapered Cell
214
Design methodology and power conditioning circuit of vibration based MEMS converters for wireless sensor networks
215
Design methodology and practice of VLSI functional test synthesis
216
Design Methodology and Protection Strategy for ESD-CDM Robust Digital System Design in 90-nm and 130-nm Technologies
217
Design Methodology and Run-Time Management for Predictable Many-Core Systems
218
Design methodology and simulation tools for mixed analog-digital integrated circuits
219
Design methodology and size limitations of submicrometer MOSFETs for DRAM application
220
Design methodology and synthesis techniques for ladder-type SAW resonator coupled filters
221
Design methodology and system for a configurable media embedded processor extensible to VLIW architecture
222
Design Methodology and Trade-Offs Analysis for Parameterized Dynamically Reconfigurable Processor Arrays
223
Design methodology and workflow for MEMS design
224
Design Methodology Based On The Analog Blocks Retargeting From Bulk To FD SOI Using EKV Model
225
Design Methodology for ΣΔM
226
Design Methodology for 2.4GHz Dual-Core Microprocessor
227
Design methodology for a 1.0 μ cell-based library efficiently optimized for speed and area
228
Design methodology for a 1.0 GHz microprocessor
229
Design Methodology for a 40-GSamples/s Track and Hold Amplifier in 0.18-
SiGe BiCMOS Technology
230
Design methodology for a block motion estimation IP core
231
Design methodology for a CMOS based power amplifier deploying a passive inductor
232
Design methodology for a dithered reduced complexity Digital MASH Delta-Sigma Modulator
233
Design methodology for a divide-by-4 LC injection-locked frequency divider based on nonlinear analysis
234
Design Methodology for a High Performance Robust DVB-S2 Decoder Implementation
235
Design methodology for a high-Q self-resonant coil for medical and wireless-power applications
236
Design methodology for a large communication chip
237
Design methodology for a low-frequency current-starved voltage-controlled oscillator with a frequency divider
238
Design Methodology for a Miniaturized Frequency Selective Surface Using Lumped Reactive Components
239
Design methodology for a MIPS compatible embedded control processor
240
Design Methodology for a Modular Component Based Software Architecture
241
Design methodology for a novel planar three degrees of freedom parallel machine tool
242
Design methodology for a one-shot Reed-Solomon encoder and decoder
243
Design methodology for a range-extended PHEV
244
Design Methodology for a Rankine Microturbine: Thermomechanical Analysis and Material Selection
245
Design Methodology for a Reactively Loaded Yagi–Uda Antenna
246
Design methodology for a reduced complexity single quantizer digital delta-sigma modulator
247
Design methodology for a robust and energy-efficient millimeter-wave wireless network-on-chip
248
Design Methodology for a SEAREV Wave Energy Converter
249
Design Methodology for a SEAREV Wave Energy Converter
250
Design methodology for a tightly coupled VLIW/reconfigurable matrix architecture: a case study
251
Design Methodology for a Two Octave, High Power MMIC Amplifier Chain
252
Design methodology for a very high frequency resonant boost converter
253
Design Methodology for a Very High Frequency Resonant Boost Converter
254
Design methodology for accelerating software executions with FPGA
255
Design methodology for analog circuit designs using proposed field programmable basic analog building blocks
256
Design methodology for analog high frequency ICs
257
Design methodology for analog monolithic circuits
258
Design methodology for analog VLSI with over 10000 elements
259
Design methodology for approximate accumulator based on statistical error model
260
Design methodology for autonomous operation of a Micro-grid
261
Design methodology for Booth-encoded Montgomery module design for RSA cryptosystem
262
Design methodology for broadband delta-sigma analog-to-digital converters
263
Design methodology for Carbon Nanotube based circuits in the presence of metallic tubes
264
Design methodology for chip-on-chip applications
265
Design methodology for chip-on-chip applications
266
Design Methodology for Clocked Storage Elements Robust to Process Variations
267
Design methodology for CMOS distributed amplifiers
268
Design Methodology for CMOS Gain-Boosted Folded-Cascode OTA with Application to SOI technology
269
Design Methodology for CMOS Low-Noise Amplifiers Using Power Matching Techniques
270
Design methodology for complex FPGA-based controllers - Application to an EKF sensorless AC drive
271
Design methodology for construction of asynchronous pipelines with Handel-C
272
Design methodology for controlled-Q resonators in OTA-based filters
273
Design methodology for creating an effective test environment
274
Design methodology for custom LSI VLSI circuits
275
Design methodology for deep submicron CMOS
276
Design methodology for defect tolerant integrated circuits
277
Design methodology for designing second order microstrip dual-mode filters
278
Design methodology for digital signal processing
279
Design methodology for direct mapping of iterative algorithms on array architectures
280
Design methodology for distributed power amplifier in Software-Defined Radio applications
281
Design methodology for distributed power amplifier in software-defined radio applications
282
Design Methodology for Domain Specific Parameterizable Particle Filter Realizations
283
Design Methodology for Dual Resonance Pulse Transformers
284
Design Methodology for Dual-Band Doherty Power Amplifier With Performance Enhancement Using Dual-Band Offset Lines
285
Design methodology for dynamic voltage scaling in the buck converter
286
Design Methodology for Electron-Trap Memory Cells
287
Design methodology for energy harvesting microsystems
288
Design methodology for ETSI SDH subnetworks employing SNCP-rings
289
Design Methodology for f Σ Δ Modulators
290
Design methodology for face detection acceleration
291
Design methodology for fault tolerant ASICs
292
Design methodology for fault-tolerant heterogeneous MPSoC under real-time constraints
293
Design methodology for fine-grained leakage control in MTCMOS
294
Design Methodology for Flexible Buswork Between Substation Equipment Subjected to Earthquakes
295
Design methodology for FPGA implementation of lattice piecewise-affine functions
296
Design Methodology for Global Resonant
H
-Tree Clock Distribution Networks
297
Design methodology for global resonant H-tree clock distribution networks
298
Design methodology for GMICRO/500 TRON microprocessor
299
Design methodology for hardware-efficient fault-tolerant nanoscale circuits
300
Design Methodology for High Brightness Projectors
301
Design Methodology for High Efficient Inductive Power Transfer Systems With High Coil Positioning Flexibility
302
Design methodology for high performance heterogeneous SoC´s for converged metropolitan area networks
303
Design Methodology for High Speed and Low Power Digital Circuits with Energy Economized Pass-transistor Logic (EEPL)
304
Design Methodology for Highly Reliable, High Performance ReRAM and 3-Bit/Cell MLC NAND Flash Solid-State Storage
305
Design Methodology for High-Performance Segmented Rotor Switched Reluctance Motors
306
Design methodology for high-speed iterative decoder architectures
307
Design methodology for IC manufacturability based on regular logic-bricks
308
Design methodology for identifying optimum photovoltaic system configuration at UNC Charlotte
309
Design methodology for implementation of very fast arithmetic primitives using quantum well HEMT technology
310
Design methodology for inductive power transfer systems targeting high power implantable devices
311
Design methodology for innovative hybrid manufacturing technologies
312
Design methodology for IP providers
313
Design methodology for IRA codes
314
Design Methodology for Large Custom VLSI Processors
315
Design Methodology for Light-Emitting Diode Systems by Considering an Electrothermal Model
316
Design Methodology for Low Power and Parametric Robustness Through Output-Quality Modulation: Application to Color-Interpolation Filtering
317
Design methodology for low power data compressors based on a window detector in a 54×54 bit multiplier
318
Design methodology for low power RF LNA based on the figure of merit and the inversion coefficient
319
Design methodology for low power, high-speed CMOS devices utilizing SOI technology
320
Design methodology for low-power embedded microprocessors
321
Design methodology for low-power embedded microprocessors
322
Design methodology for low-voltage MOSFETs
323
Design Methodology for Maximum Power Transmission, Optimal BER-SNR and Data Rate in Biomedical Implants
324
Design methodology for memory-efficient multi-standard baseband processors
325
Design methodology for microcontroller core-based ASIC design
326
Design methodology for micromechanical systems at commercial CMOS foundries through MOSIS
327
Design methodology for miniaturization of motor equipped in a fluid intermittent control system
328
Design methodology for minimizing hysteretic V/sub T/-variation in partially-depleted SOI CMOS
329
Design methodology for mitigating transient errors in analogue and mixed-signal circuits
330
Design methodology for mixed-domain systems-on-a-chip [MEMS design]
331
Design methodology for multilayer coupled line filters
332
Design methodology for multiple domain power distribution systems
333
Design Methodology for Nearly Linear-Phase Recursive Digital Filters by Constrained Optimization
334
Design methodology for neural network simulation of sequential circuits using neural storage elements
335
Design methodology for non insulated DC-DC converter: application to 42V-14V "Powernet"
336
Design methodology for on-chip bus architectures using system-on-chip network protocol
337
Design methodology for on-chip interconnects
338
Design Methodology for Optical Interconnect Topologies in NoCs With BER and Transmit Power Constraints
339
Design methodology for optimising a high insulation voltage insulated gate bipolar transistor gate driver signal transmission function
340
Design methodology for optimization of analog building blocks using genetic algorithms
341
Design Methodology For Optimizing Gate Driven ESD Protection Circuits In Submicron Cmos Processes
342
Design methodology for over 100MFLOPS 64bit MPU with 0.8/spl mu/m BiCMOS technology
343
Design methodology for partial dynamic reconfiguration: a new degree of freedom in the HW/SW codesign
344
Design methodology for PDN synthesis on multilayer PCBs
345
Design methodology for phased subarray antennas with optimized element phase control
346
Design methodology for phased subarray antennas with optimized element phase control
347
Design methodology for PicoRadio networks
348
Design Methodology for Pipelined Heterogeneous Multiprocessor System
349
Design methodology for powerline coupling circuit: a system-level and Monte Carlo simulation based approach
350
Design Methodology for Real-Time FPGA-Based Sound Synthesis
351
Design Methodology for Rough Neuro-Fuzzy Classification with Missing Data
352
Design methodology for runtime reconfigurable FPGA: from high level specification down to implementation
353
Design methodology for sample preparation on digital microfluidic biochips
354
Design methodology for self-timed VLSI systems
355
Design methodology for Sievenpiper high-impedance surfaces: an artificial magnetic conductor for positive gain electrically small antennas
356
Design methodology for Sigma-Delta modulators based on a genetic algorithm using hybrid cost functions
357
Design methodology for single electron based building blocks
358
Design methodology for SoC architectures based on reusable virtual cores
359
Design methodology for square wave resonant clock generators
360
Design methodology for stoppable clock systems
361
Design methodology for street lighting luminaires based on a photometrical analysis
362
Design methodology for synthesizing clock distribution networks exploiting nonzero localized clock skew
363
Design Methodology for synthetic biosystems
364
Design methodology for system correctness: lessons from the Tandem NonStop CLX
365
Design methodology for systematic derivation of fault-tolerant array processors
366
Design methodology for the development of a computer-based automatic train control system
367
Design methodology for the high-performance G4 S/390 microprocessor
368
Design methodology for the implementation of multidimensional circular convolution
369
Design methodology for the optimization of transformer-loaded RF circuits
370
Design methodology for the optimization of transformer-loaded RF circuits
371
Design methodology for the thorax and shoulder of human mimetic musculoskeletal humanoid Kenshiro -a thorax structure with rib like surface -
372
Design methodology for torque angle control of a non-linear vector controlled Variable Reluctance Synchronous Motor
373
Design Methodology for Tunable SAW Devices Using Magnetostrictive Thin Films
374
Design Methodology For Undersea Umbilical Cables
375
Design methodology for universal line input boost power factor correction magnetics
376
Design Methodology for Variable Leakage Flux IPM for Automobile Traction Drives
377
Design methodology for variable leakage flux IPM for automobile traction drives
378
Design methodology for variable-flux, flux-intensifying interior permanent magnet machines for an electric-vehicle-class inverter rating
379
Design Methodology for Voltage-Overscaled Ultra-Low-Power Systems
380
Design methodology for WDM backbone networks using FWM-aware heuristic algorithm
381
Design methodology for wireless nodes with printed antennas
382
Design methodology for ZCT and ZCZVT inverters
383
Design methodology innovations address manufacturing technology challenges: power and performance
384
Design methodology internal sub state observer using CPLD
385
Design methodology management
386
Design Methodology Management Using Graph Grammars
387
Design methodology management-a CAD framework initiative perspective
388
Design methodology of 16-bit Sigma-Delta A/D and D/A converters in a single chip
389
Design methodology of a 1.2-µm double-level-metal CMOS technology
390
Design methodology of a 1.2-μm double-level-metal CMOS technology
391
Design methodology of a 200 MHz superscalar macroprocessor: SH-4
392
Design methodology of a 500 W wireless power transfer converter
393
Design methodology of a balancing network for supercapacitors
394
Design methodology of a brushless IPM machine for a zero-speed injection based sensorless control
395
Design methodology of a cable terminator to reduce reflected voltage on AC motors
396
Design methodology of a ceilometer lidar prototype
397
Design methodology of a class of triple-mode bandpass filters using a patch-loaded cross resonator
398
Design methodology of a combined battery-ultracapacitor energy storage unit for vehicle power management
399
Design methodology of a configurable system-on-chip architecture
400
Design Methodology of a Fault Aware Controller Using an Incipient Fault Diagonizer
401
Design methodology of a hardware-efficiency VLIW architecture with highly adaptable data path
402
Design methodology of a high power RF MEMS switch for wireless applications
403
Design methodology of a hybrid micro-scale fuel cell-thin-film lithium ion source
404
Design methodology of a low power high speed CMOS ADC
405
Design methodology of a non-invasive sensor to measure the current of the output capacitor for a very fast non-linear control
406
Design Methodology of a Permanent Magnet Synchronous Machine for a Screwdriver Application
407
Design methodology of a robust ESD protection circuit for STI process 256 Mb NAND flash memory
408
Design methodology of a robust ESD protection circuit for STI process 256 Mb NAND flash memory
409
Design methodology of a robust ESD protection circuit for STI process 256 Mb NAND memory
410
Design methodology of a self-priming PMMA valveless piezoelectric micro-pump
411
Design methodology of a series-series inductive power transfer system for electric vehicle battery charger application
412
Design methodology of a single-phase line start PM motor using conditions for magnetic balance and copper loss minimization
413
Design methodology of a test chip for a portable 8ns 10 ports register file
414
Design methodology of an ASIC TRNG based on an open-loop delay chain
415
Design methodology of an audio sensor system using switched-current cells
416
Design methodology of an educational computer-aided telematics service
417
Design methodology of an electric vehicle hybrid energy storage unit for improved energy efficiency
418
Design methodology of an interleaved buck converter for onboard automotive application, multi-objective optimisation under multi-physic constraints
419
Design methodology of baseband analog chain to maximize a spurious free dynamic range for ATSC terrestrial and cable digital TV tuner
420
Design Methodology of Bidirectional CLLC Resonant Converter for High-Frequency Isolation of DC Distribution Systems
421
Design Methodology of Body-Biasing Scheme for Low Power System LSI With Multi- V
th
Transistors
422
Design methodology of CMOS algorithmic current A/D converters in view of transistor mismatches
423
Design methodology of CMOS low power
424
Design Methodology of Concatenate Code for Extended RS Combined with Rotational Invariant TCM code
425
Design methodology of configurable high performance packet parser for FPGA
426
Design Methodology of Control System with Mutual Exclusion
427
Design Methodology of Controllers
428
Design methodology of decimation filters for oversampled ADC based on quadratic programming
429
Design Methodology Of Deep Submicron CMOS Devices For 1V Operation
430
Design methodology of drive train for a series-parallel hybrid electric vehicle (SP-HEV) and its power flow control strategy
431
Design methodology of dual active bridge converter for solid state transformer application in smart grid
432
Design methodology of embedded DRAM with virtual-socket architecture
433
Design methodology of feedback-LNAs for GHz applications
434
Design methodology of FinFET devices that meet IC-Level HBM ESD targets
435
Design Methodology of FIR Filtering IP Cores for dsp based Systems
436
Design methodology of FSMs with intrinsic fault tolerance and recovery capabilities
437
Design methodology of fuel cell electric vehicle power system
438
Design methodology of high efficiency continuous mode transfer power amplifiers with one octave bandwidth
439
Design methodology of high frequency ultrasonic transducer for wire bonding
440
Design methodology of high performance microprocessor using ultra-low threshold voltage CMOS
441
Design methodology of high performance on-chip global interconnect using terminated transmission-line
442
Design Methodology of HTS Bulk Machine for Direct-Driven Wind Generation
443
Design methodology of IPMSM using synthetic flux linkage
444
Design methodology of large-scale thermoelectric generation: A hierarchical modeling approach in SPICE
445
Design Methodology of LLC Resonant Converters for Electric Vehicle Battery Chargers
446
Design methodology of low power JPEG2000 codec exploiting dual voltage scaling
447
Design Methodology of Low Power JPEG2000 Codec Exploiting Dual Voltage Scaling
448
Design methodology of low-power CMOS RF-ICs
449
Design methodology of low-power microprocessors
450
Design methodology of mapping iterative algorithms on piecewise regular processor arrays
451
Design methodology of microstrip lines using dimensional analysis
452
Design methodology of Miller frequency compensation with current buffer/amplifier
453
Design methodology of multiple-valued logic voltage-mode storage circuits
454
Design methodology of multistage time-domain logic speculation circuits
455
Design methodology of nested-Miller amplifiers for small capacitive loads
456
Design Methodology of On-Chip Power Distribution Network
457
Design Methodology of Operations Supporting Systems Based on TMForum NGOSS
458
Design methodology of optimal trajectories minimizing loss of induction motor under torque amplitude limit
459
Design methodology of piezoresonant sensors construction with a modulated interelectrode gap
460
Design methodology of P-res controllers with harmonic compensation for three-phase DC-AC grid-tie inverters with LCL output filter
461
Design methodology of P-Res controllers with harmonic compensation technique for modular multilevel converter fed from partially shaded PV array
462
Design methodology of process variation tolerant D-Flip-Flops for low voltage circuit operation
463
Design Methodology of Regular Logic Bricks for Robust Integrated Circuits
464
Design methodology of resonant inductor in a ZVS inverter
465
Design Methodology of Resonant Inductor in a ZVS Inverter
466
Design methodology of series DC coupling transformer in a medium-voltage DC amplifier system
467
Design methodology of single crystal tuning fork gyroscope for automotive applications
468
Design methodology of standard analog circuit block using EKV MOSFET model and validation using BSIM3v3 MOSFET model
469
Design Methodology of Subthreshold Three-Stage CMOS OTAs Suitable for Ultra-Low-Power Low-Area and High Driving Capability
470
Design methodology of tensor product based control models via HOSVD and LMIs
471
Design methodology of the embedded DRAM with the virtual socket architecture
472
Design methodology of the high performance large-grain polysilicon MOSFET
473
Design methodology of tri-gate poly-Si MOSFETs with 10nm nanowire channel to enhance short-channel performance and reduce V
th
& I
d
variability
474
Design methodology of tunable impedance matching circuit with SOI CMOS tunable capacitor array for RF FEM
475
Design methodology of ultra low-power MPEG4 codec core exploiting voltage scaling techniques
476
Design methodology of variable latency adders with multistage function speculation
477
Design methodology of VLSI power electronics digital controller based on Matlab-Modelsim co-simulation
478
Design methodology of VLSI with multiple valued logic
479
Design methodology of VLSI with multiple valued logic
480
Design methodology to achieve good testability of VLSI chips: An industrial perspective
481
Design methodology to distribute on-chip power in next generation integrated circuits
482
Design methodology to harmonic mitigation using phase multiplication for distribution networks
483
Design methodology to improve the converters´ efficiency applied to photovoltaic systems
484
Design methodology to limit coupling between board tracks on PCB level in realtime
485
Design methodology to trade off power, output quality and error resiliency: application to color interpolation filtering
486
Design methodology used in a single-chip CMOS 900 MHz spread-spectrum wireless transceiver
487
Design methodology using the newly proposed synthetic flux linkages considering cross-Magnetization for Interior PM Synchronous Machine
488
Design methodology with optimization of an interleaved buck converter for automotive application
489
Design methodology, measurement and application of MMIC transmission line transformers
490
Design methods and actual performances of conductors for the superconducting coils of tokamaks
491
Design methods and integrated control for microgrid
492
Design methods and tools (organized by CIPS)
493
Design methods and tools (organized by CIPS) mechatronics (organized by CIPS)
494
Design methods applied to the selection of a rapid prototyping resource
495
Design methods at AWRE, Aldermaston
496
Design Methods for 3D RFID Antennas Located on a Conducting Ground Plane
497
Design methods for augmented reality in-vehicle infotainment systems
498
Design methods for CMOS low-current finely tunable voltage references covering a wide output range
499
Design methods for CNN spatial filters with circular symmetry
500
Design Methods for Complex Digital Circuits
501
Design methods for confined flows
502
Design Methods for Current Source Inverter/Induction Motor Drive Systems
503
Design methods for current source inverter/induction motor drive systems
504
Design Methods for Digital Systems
505
Design methods for digital systems including parallelism
506
Design methods for digital systems. Part 1: Concurrency constructs
507
Design methods for digital systems. Part 2: Structures involving control and data
508
Design methods for efficient multiband antennas with parasitic elements
509
Design methods for fabrication of an analog network protocol chip
510
Design methods for feedback controllers of nonlinear systems based on EB and virtual optimization approaches
511
Design methods for innovative hand prostheses
512
Design methods for irregular repeat accumulate codes
513
Design methods for irregular repeat-accumulate codes
514
Design methods for mirrors in a quasi-optical mode converter for a frequency step-tunable gyrotron
515
Design Methods for Misaligned and Mispositioned Carbon-Nanotube Immune Circuits
516
Design methods for mobile communications network dimensioning under realistic propagation conditions [Book Review]
517
Design Methods for Multiple-Valued Input Address Generators
518
Design Methods for Parallel Hardware Implementation of Multimedia Iterative Algorithms
519
Design methods for partial filter banks using interpolation
520
Design methods for periodically time varying digital filters
521
Design methods for pipeline & delta-sigma A-to-D converters with convex optimization
522
Design methods for real time software
523
Design methods for Security and Trust
524
Design Methods for Shockproofed Ionization-Chambers (Up to 100 G)
525
Design methods for SOC control CODECS to enhance reuse
526
Design Methods for Soft Magnetic Materials in Radio
527
Design Methods for Symmetric Function Generators Based on Threshold Elements
528
Design methods for system-on-a-chip control codecs to enhance performance and reuse
529
Design Methods for the Classical Filter
530
Design methods for time-domain equalizers in DMT transceivers
531
Design methods for VQ by linear mappings of block codes
532
Design methods for Wireless Sensor Network Building Energy Monitoring Systems
533
Design methods of broadband circularly polarized patch antennas using artificial ground structure
534
Design methods of decentralized control of large-scale systems based on block diagonal dominance
535
Design Methods of General Fuzzy Systems as Function Approximators
536
Design methods of general fuzzy systems as function approximators
537
Design Methods of Multi-DSP Parallel Processing System
538
Design methods of multithreaded architectures for multicore microcontrollers
539
Design methods of the spherical quadrupole magnets and sextupole magnets
540
Design metrics and visualization techniques for analyzing the performance of MOEAs in DSE
541
Design metrics for blind ADC-based wireline receivers
542
Design metrics for RTL level estimation of delay variability due to intradie (random) variations
543
Design metrics for web application maintainability measurement
544
Design Metrics Improvement for SRAMs Using Symmetric Dual-
Spacer (SymD-
) FinFETs
545
Design metrics improvement of 10TSRAM cell using CNFET
546
Design metrics: an empirical analysis
547
Design Micro-controller Electronic Ballast for Multiple High Press Sodium Lamps
548
Design microgrid for a distribution network: A case study of the University of Queensland
549
Design Microstrip Patch Antenna and Role of Hexaferrite Cavity in X-band
550
Design Migration Across Technology - Making It Work
551
Design Migration From Peripheral ASIC Design to Area-I/O Flip-Chip Design by Chip I/O Planning and Legalization
552
Design Migration from Peripheral ASIC Design to Area-IO Flip-Chip Design by Chip I/O Planning and Legalization
553
DESIGN MINI SCADA FOR FURNACE INDUCTION REACTOR OF KERNEL COATING
554
Design Miniature Telementering Blast-Off Machine According to the FPGA
555
Design Mini-PLC based on ATxmega256A3U-AU microcontroller
556
Design Minkowski shaped patch antenna with rectangular parasitic patch elements for 5.8 GHz applications
557
Design model and data management for 3D integration technologies
558
Design model and guidelines for n-well guard ring in epitaxial CMOS
559
Design model execution engine based on web services for distributed geography modeling environment
560
Design model for bulk CMOS scaling enabling accurate latchup prediction
561
Design model for bulk CMOS scaling enabling accurate latch-up prediction
562
Design model for electrical distribution systems considering renewable, conventional and energy storage units
563
Design model for fully integrated high-performance linear CMOS power amplifiers
564
Design model for minority-carrier well-type guard-rings in CMOS circuits
565
Design model of axial flow compressor for high temperature power plants by latest loss models
566
Design model of compound technical object under noise influence
567
Design model of microphone arrays for multirotor helicopters
568
Design model on performance prediction for VLSI systems
569
Design model on ship trajectory control using particle swarm optimisation
570
Design Model with the Minimal Maintenance Cost for Reusable Products
571
Design modeling and certain investigations of median filter
572
Design modeling and simulation of electrothermally actuated microgyroscope fabricated using the MetalMUMPs
573
Design modeling and simulation of low voltage squirrel cage induction motor for medium weight electric vehicle
574
Design Modeling and Simulation of Supervisor Control for Hybrid Power System
575
Design modeling and system implementation for integral product conceptual design
576
Design modeling of CMUT´s for medical imaging
577
Design modeling of high-efficiency p
+
-n indium phosphide solar cells
578
Design models and deployment strategy to effectively manage question bank for assessment in large enterprises
579
Design models and steps for codesign
580
Design models for computer-human interfaces
581
Design models for rectangular microstrip resonator antennas
582
Design models for robust multilayer next generation Internet core networks, carrying elastic traffic
583
Design Models of Pipelined Units for Digital Signal Processing
584
Design modification and layout of utility substations for six phase transmission
585
Design modification of a 3-PRC compliant parallel micromanipulator for micro/nano scale manipulation
586
Design modification of a biochip microchannel separator with integrated curve constrictions for enhanced separation behaviour
587
Design Modification of Micro-Actuator to Improve Shock Resistance of HDD
588
Design modification of millimeter wave transmission on ITER equatorial launcher
589
Design modification of plasma facing component and cassette body for ITER divertor
590
Design modification on metallic improved cooking stove KU-3 model at Kathmandu University
591
Design modification to improve anti-shock performance of the stamped base using 2.5 inch HDD
592
Design modifications and system studies to relocate a static VAr compensator in a power system with power quality problems
593
Design modifications of the electrical system to use intermittent engine operation
594
Design Modifications to Improve the Antishock Performance of a Stamped Base for a 2.5-in HDD
595
Design modifications to increase fatigue life of fiber ropes
596
Design module: A modularity vision beyond code: Not only program code but also a design model is a module
597
Design monitoring system kWh meter 3 phase using RFID system: PT. Multifabrindo Gemilang
598
Design Monitoring Systems for Multi-channel Technology in Wireless Sensor Networks
599
Design monopole antenna with fluorescent tube at 4.9GHz
600
Design More Usable and Reliable Large-Scale Software Systems: A New Approach Based on P2P, SOA and Web 2.0
601
Design motive and pattern in screwpine and pandan plaiting from Peninsular Malaysia
602
Design motorized hand held flexible instrument for minimally invasive surgery (MIS)
603
Design MRAC PID control for fan and plate process
604
Design Multi-Band Microstrip Patch Antennas for Wireless Terminals
605
Design multicast protocols for non-cooperative networks
606
Design Multiparameter Anaesthesia Depth Monitor
607
Design multivariable control for a ship based on robust methodology
608
Design Muntoi web-based framework and search engine analytics for thematic virtual museums
609
Design nd optimization of up-conversion CMOS mixer for UWB application
610
Design networked control systems via time-varying delay compensation approach
611
Design networks-on-chip with latency/ bandwidth guarantees
612
Design new detection technique for deposition of radon´s daughter onto human blood samples
613
Design new ultrawide-band planar metal-plate monopole antenna by FDTD method
614
Design news
615
Design notation for dynamic evolution in component based distributed systems
616
Design Note on a Serrated Choke (Correspondence)
617
Design Note on an L-Band Strip-Line Circulator (Correspondence)
618
Design notebooks as indicators of student participation in team activities
619
Design notes and initial results from a 100 pps, 250 KV switch testing platform
620
Design notes for a 3 metre radio therapy apparatus
621
Design o f a n FPGA based neural controller
622
Design Object Modeling Based on Designer´s Creation Idea for Design Support of Conceptual Stage of Architectural Design
623
Design Objectives and Realization of TVBS Receivers
624
Design objectives for spring mechanism generator circuit breaker with high reliability
625
Design Objectives of Antenna for Satellite Communication VSAT and USAT Earth Station
626
Design objectives of new digital control and monitoring of high voltage circuit breakers
627
Design objectives of optimal active queue management controllers
628
Design of "chip-scale" patch antennas for 5-6 GHz wireless microsystems
629
Design of "Flat-Shooting" Antenna Arrays
630
Design of ℓ
1
-optimal controllers with flexible disturbance rejection level
631
Design of Π core and Π
2
core PM-aided switched reluctance motors
632
Design of ΣΔ modulators using FGMOS transistors
633
Design of γ Dose-rate Remote Monitoring System Based on Optical Fiber Communication
634
Design of λ/4 phase shifted DFB fibre Raman laser
635
Design of “Chess-board” like photonic crystal structure for enhancement of LED light extraction
636
Design of “masthead” combiners
637
Design of “Personalized” Classifier Using Soft Computing Techniques for “Personalized” Facial Expression Recognition
638
Design of μ suboptimal controllers based on S-procedure and generalized strong positive real lemma
639
Design of Π impedance matching networks
640
Design of ΣΔ modulators with reduced number of operational amplifiers
641
Design of (15, 11) Hamming Code Encoding and Decoding System Based on FPGA
642
Design of (Inter-) Organizational Systems: Collaboration & Modeling
643
Design of ~1-Optimal Controllers with Flexible Disturbance Rejection Level
644
Design of ´optimum´ three port symmetrical junctions for diplexer application
645
Design of
H
∞
-optimal compensators for singularly perturbed systems
646
Design of
H
2
and
H
∞
controllers for induction motor drives
647
Design of
m
-out-of-
n
bit-voters
648
Design of
n
-bit digital phase shifter using single CRLH TL unit cell
649
Design of
RC
-active filters for large variations in the gain-bandwidth product
650
Design of
-Tolerant I/O Buffer With PVT Compensation Realized by Only
-Band and
-Band Colpitts Oscillators Using a Parasitic Cancellation Technique
652
Design of
-Band RF CMOS Transceiver for FMCW Monopulse Radar
653
Design of
Filters of Active-Front-End Two-Level Voltage-Source Converters
654
Design of
-Based Short Period Model Superconducting Helical Undulator
655
Design of 0.05–5 GHz LNA for Cognitive Radios receiver
656
Design of 0.1∼14 GHz fully-integrated tapered distributed amplifiers in 0.25μm CMOS
657
Design of 0.13µm CMOS multi-valued analog to digital converter
658
Design of 0.18 μm CMOS test chip for package models and I/O characteristics verification
659
Design of 0.18-μm CMOS low drop-out regulator for 2.4-GHz Wireless Transceiver
660
Design of 0.18um high voltage LDMOS for automotive application
661
Design of 0.3–6GHz spiral antenna coupler
662
Design of 0.35 μm SiGe LNAs for UWB communications systems
663
Design of 0.35-mm pitch QFP lead and its assembly technology
664
Design of 0.35-mm-pitch QFP lead and its assembly technology
665
Design of 0.45V,1.3mW ultra high gain CMOS LNA using g
m
-boosting and forward body biasing technique
666
Design of 0.4V, 386nW OTA using DTMOS technique for biomedical applications
667
Design of 0.5V, 1.28mW CMOS UWB mixer using the body effect
668
Design of 0.5V, 450μW CMOS LNA using current reuse and forward body bias technique
669
Design of 0.71λ, spacing 8-element microstrip patch antenna linear array for 0.43GHz wind profiling radar
670
Design of 0.73λ inter-element spacing linear array for 0.43GHz P/UHF-band tropospheric radar wind profiler
671
Design of 0-dB forward coupler using half-mode groove waveguide for wireless power transmission
672
Design of 0-dB reconfigurable directional coupler using metamaterial structure
673
Design of 1 kW PFC converter with minimum-voltage active-clamping
674
Design of 1 V bandgap reference without native MOS transistor in 0.18 µm CMOS technology
675
Design of 1 V switched-current cells in standard CMOS process
676
Design of 1.1 GHz Highly Linear Digitally-Controlled Ring Oscillator with Wide Tuning Range
677
Design of 1.2 Gbps MIMO WLAN system for 4K digital cinema transmission
678
Design of 1.2 GeV synchrotron light source for X-ray lithography at Samsung Heavy Industries
679
Design of 1.2 kV Power Switches With Low
Using GaN-Based Vertical JFET
680
Design of 1.28-GB/s high bandwidth 2-Mb SRAM for integrated memory array processor applications
681
Design of 1.2GHz bandwidth digital-correlator in fully polarimetric microwave radiometer
682
Design of 1.2-V Broadband High Data-Rate MMW CMOS I/Q Modulator and Demodulator Using Modified Gilbert-Cell Mixer
683
Design of 1.3 GHz Microstrip Highpass Filter Using Optimum Distributed Short Circuited Stubs
684
Design of 1.4kw telecom rectifier delivering full power from 90Vac to 300Vac
685
Design of 1.5 GHz Quasilumped Microstrip Highpass Filter
686
Design of 1.55 μm gigabit/s submarine repeatered transmission system
687
Design of 1.5V-3GHz CMOS two stages three loops chained VCO
688
Design of 1.8V 1GHz 0.18μm CMOS LNA for GPS
689
Design of 1.94-GHz CMOS Noise-Cancellation VCO
690
Design of 1:3 unequal Wilkinson power divider with defected ground structure
691
Design of 1:4 Ultrawideband Hybrid Transmission-Line Balun
692
Design of 10 dB 90° branch line coupler using microstrip line with defected ground structure
693
Design of 10 dB branch line coupler by using DGS
694
Design of 10 GHz sampling rate digital FIR filters with powers-of-two coefficients
695
Design of 10 GHz, 2.6 mW frequency divider in 0.25 μm CMOS
696
Design of 10 kW resonant push-pull DC-DC converter for solid oxide fuel cell applications
697
Design of 10 kW switching power supply and discharge circuit for wire-cut electric discharge machine
698
Design of 10 Mega-pixel Mobile Phone Lens
699
Design of 100 MW second harmonic gyroklystron for accelerator applications
700
Design of 100 MW, two-cavity gyroklystrons for accelerator applications
701
Design of 1000-kV Ultra-High Voltage AC Corona Test Cage in China
702
Design of 100G capturing robot
703
Design of 100G PDM-QPSK unrepeatered transmission systems with EDFA only amplification
704
Design of 100kW water load for P-band Continuous Wave Magnetron
705
Design of 100MHz wideband Doherty amplifier for 1.95GHz LTE-Advanced application
706
Design of 100nm Single-Electron Transistor (SET) by 2D TCAD Simulation
707
Design of 1060 nm tapered lasers with separate contacts
708
Design of 10b SAR ADC for biomedical applications
709
Design of 10kV, 2A high-voltage DC power supply using two stage control
710
Design of 10-nm-scale recessed asymmetric Schottky barrier MOSFETs
711
Design of 11 T Twin-Aperture
Dipole Demonstrator Magnet for LHC Upgrades
712
Design of 110–152 GHz rotary traveling wave oscillators in 65 nm CMOS technology
713
Design of 12 W X-band high power cascade amplifier
714
Design of 120∶1 frequency divider for a 12.6 GHz phase-locked loop
715
Design of 125 μm cladding multi-core fiber with full-band compatibility to conventional single-mode fiber
716
Design of 128QAM channel equalizer in FPGA
717
Design of 12-bit 100-MHz current-steering DAC for SOC applications
718
Design of 12bit 100MHz Sample and Hold circuit for pipeline ADC
719
Design of 12-bit, 1.8V current steering digital-to-analog converter
720
Design of 12-Bit, 40 MS/s Pipeline ADC for application in WiMAX transceiver
721
Design of 12-channel 120Gb/s laser diode driver array in 0.18µm CMOS technology
722
Design of 12-slot 10-pole Permanant Magnet Flux-Switching Machine with hybrid excitation for hybrid electric vehicle
723
Design of 1-3 piezocomposite hydrophones using finite element analysis
724
Design of 1-3 piezocomposite hydrostatic transducers using finite element analysis
725
Design of 13.56 MHz ASK transmitter for near field communication using a DLL architecture
726
Design of 13.56 MHz Smartcard Stickers with Ferrite for Payment and Authentication
727
Design of 13.56MHz power recovery circuit with signal transmission for contactless bank IC card
728
Design of 13.56MHz RF card reader based on MF RC500
729
Design of 135 MW X-band relativistic klystron for linear collider
730
Design of 140–170 MHz class E power amplifier with parallel circuit on GaN HEMT
731
Design of 15 MHz concave array transducers for ophthalmic imaging
732
Design of 1553 protocol controller for reliable data transfer in aircrafts
733
Design of 1553B avionics bus interface chip based on FPGA
734
Design of 1553B Bus Testing and Simulating System
735
Design of 16 bit digital filter used in delta-sigma A/D converter
736
Design of 16 channel multiplexer using SOI ring resonator array
737
Design of 16-bit 400MSPS current steering D/A converter
738
Design of 16-bits constant-current LED driver
739
Design of 16-channel CAGO-CFAR ASIC block with target-eliminating circuit
740
Design of 16m
2
sundial solar tracking machine
741
Design of 16MB Addressing Spaces in an MCU Based on the MCS-51 Structure
742
Design of 16-QAM space-time trellis codes for quasi-static fading channels
743
Design of 16-QAM ZCZ sequences for AS-CDMA communication systems using the 16-QAM constellation
744
Design of 170 GHz, 1.5-MW Conventional Cavity Gyrotron for Plasma Heating
745
Design of 18 krpm rated speed SMPM synchronous machine for “wobble” laser welding
746
Design of 180°-switched-line phase shifter with constant phase shift using CRLH TL
747
Design of 183GHz/325GHz dual-channel quasi-optical system
748
Design of 18-bit decimator for sigma-delta analog to digital converter with variable oversampling rate for audio application
749
Design of 1Ã\x972, 1Ã\x974, and 2Ã\x972 Dual Polarization Microstrip Array Antenna
750
Design of 1-D and 2-D IIR eigenfilters
751
Design of 1-D and 2-D variable fractional delay allpass filters using weighted least-squares method
752
Design of 1-D FIR filters with genetic algorithms
753
Design of 1-D FIR filters with genetic algorithms
754
Design of 1-D stable variable fractional delay IIR filters
755
Design of 1-D Stable Variable Fractional Delay IIR Filters
756
Design of 1-D Stable Variable Fractional Delay IIR Filters Using Finite Impulse Response Fitting
757
Design of 1-D variable fractional delay all-pass filters using stability controlling
758
Design of 1Gs/s open-loop Track-and-Hold for 10GBASE-T Ethernet receivers
759
Design of 1-kbit antifuse OTP memory IP using dual program voltage and its measurement
760
Design of 1kW inductive power transfer system for electric vehicle
761
Design of 1m
2
order single-layer slotted waveguide array for plasma excitation including the effect of vacuum window using the GSM-MoM analysis
762
Design of 1Mbit RRAM memory to replace eFlash
763
Design of 1MHz-switching frequency bipolar current-mode PWM controller
764
Design of 1mWCMOS OOK super-regenerative receiver for 402–405MHz medical applications
765
Design of 2 µm-period minor loops in hybrid bubble memory devices
766
Design of 2- and 3-terminal GaInP/GaAs concentrator cells for maximum yearly energy output
767
Design of 2 GHz quasi-lumped element oscillator
768
Design of 2 Stages Ring Oscillators Applying Local Networks of Feedback
769
Design of 2 x 2 SOI MMI couplers with arbitrary power coupling ratios
770
Design of 2×1 circularly polarized microstrip patch antenna array for 5.8 GHz ISM band applications
771
Design of 2×2 UWB printed antenna array for see-through-wall imaging
772
Design of 2×V
DD
logic gates with only 1×V
DD
devices in nanoscale CMOS technology
773
Design of 2∶1 multiplexer and 1∶2 demultiplexer using magnetic tunnel junction elements
774
Design of 2.1GHz RF CMOS Power Amplifier for 3G
775
Design of 2.3/3.3/5.8 GHz antenna array for wireless communication in transportation systems
776
Design of 2.4 GHz power divider with harmonic suppression
777
Design of 2.45 GHz Sierpinski fractal based miniaturized microstrip patch antenna
778
Design of 2.45GHz Planar Meander Dipole Antenna
779
Design of 2.45GHz Rectifier Antenna and Frequency Tunable Antenna Design
780
Design of 2.4-GHz CMOS reconfigurable dual-function switch network and its application on array beamforming
781
Design of 2.4GHz patch antennae for WLAN applications
782
Design of 2.4GHz power amplifier used in WLAN 802.11b by pHEMT
783
Design of 2.5 V/5 V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit
784
Design of 2.5Gb/s non-PLL-type all-digital clock recovery circuit
785
Design of 2.5Gb/s Transimpedance Amplifier using CMOS Technologies
786
Design of 2.5V, 900MHz phase-locked loop (PLL) using 0.25μm TSMC CMOS technology
787
Design of 2.92-mm Coaxial Adiabatic Lines for Quasi-Ideal Twin Microcalorimeter
788
Design of 2
VDD-Tolerant Power-Rail ESD Clamp Circuit With Consideration of Gate Leakage Current in 65-nm CMOS Technology
789
Design of 20 MeV DTL for KOMAC test facility
790
Design of 20 MeV DTL for PEFP
791
Design of 200 GHz SiGe HBT´s
792
Design of 200 W wideband Doherty amplifier with 34 % bandwidth
793
Design of 20-GHz low noise amplifier for automotive collision avoidance application
794
Design of 20kJ/s compact high voltage capacitor chargers for pulsed power application
795
Design of 2-10 GHz feedback MMIC LNA using << Visual >> technique
796
Design of 215–225 GHz subharmonic mixer using planar Schottky diodes
797
Design of 220GHz and 425GHz TMIC membrane sub-harmonic mixers
798
Design of 2-3 mixed-valued/six-valued adiabatic asynchronous up-down counter
799
Design of 24 bit DSP for audio algorithms
800
Design of 24 GHz microstrip travelling wave antenna for radar application
801
Design of 24 GHz SiGe HBT balanced power amplifier for system-on-a-chip ultra-wideband applications
802
Design of 24 GHz UWB CMOS IR-UWB transmitter with on-chip balun
803
Design of 24-GHz 0.8-V 1.51-mW Coupling Current-Mode Injection-Locked Frequency Divider With Wide Locking Range
804
Design of 24GHz CMOS VCO using armstrong topology with asymmetric transformer
805
Design of 24-GHz High-Gain Receiver Front-End Utilizing ESD-Split Input Matching Network
806
Design of 250 Mb/s 10-channel CMOS optical receiver array for computer communication
807
Design of 250-MW CW RF system for APT
808
Design of 256-Kb Low-Power Embedded SRAM
809
Design of 25-nm SALVO PMOS devices
810
Design of 270 Mbps 2?2 MIMO-OFDM system for video streaming in internet of things
811
Design of 2Ã\x97VDD-Tolerant I/O Buffer with Considerations of Gate-Oxide Reliability and Hot-Carrier Degradation
812
Design of 2-array microstrip patch antenna excited by waveguide endwall coupler
813
Design of 2-axis gimbal spaceborne X-band antenna for high data rate payload transmission
814
Design of 2B1Q transceiver for ISDN subscriber loops
815
Design of 2-band orthogonal near-symmetric CQF
816
Design of 2-channel linear phase filter bank: a lifting approach
817
Design of 2-D allpass digital filters for delay equalisation
818
Design of 2-D channel estimation filters for OFDM systems
819
Design of 2D digital filters using BP neural networks
820
Design of 2-D digital filters with almost quadrantal symmetric magnitude response without 1-D separable denominator factor constraint
821
Design of 2-D digital filters with an arbitrary response and no overflow oscillations based on a new stability condition
822
Design of 2-D digital filters with arbitrary amplitude and phase responses by using the singular value decomposition
823
Design of 2-D digital filters with finite wordlength coefficients
824
Design of 2-D digital filters with non-separable transfer functions generated from 2-D all-pass networks
825
Design of 2-D digital filters with octagonal passband and stopband boundaries
826
Design of 2-D digital filters with rectangular passbands and stopbands
827
Design of 2-D digital video filters for a PALplus-compatible HDTV transmission encoder
828
Design of 2-D Doubly Complementary Filters Based on Nonsymmetric Half-Plane Allpass Filters
829
Design of 2D error feedback network based on combinational optimization of coefficients sets
830
Design of 2-D filters composed of low-order systems
831
Design of 2-D filters for video processing using FPGAs
832
Design of 2D FIR digital filters by McClellan transformation and least squares eigencontour mapping
833
Design of 2-D FIR digital filters with complex coefficients using a least-squares approach
834
Design of 2D FIR digital filters with symmetric properties by genetic algorithm approach
835
Design of 2-D FIR fan filters for wideband beamforming and interference suppression
836
Design of 2-D FIR filter possessing purely imaginary frequency response by the transformation method
837
Design of 2-D FIR filters by feedback neural networks
838
Design of 2-D FIR filters by nonuniform frequency sampling
839
Design of 2D FIR filters by the truncation of 2D DFTs of ideal responses
840
Design of 2-D FIR filters using McClellan transformation with genetic algorithms
841
Design of 2-D Fir Filters Using Positive Trigonometric Polynomials
842
Design of 2-D FIR filters with nonuniform frequency samples
843
Design of 2-D FIR filters with power-of-two coefficients: a semidefinite programming relaxation approach
844
Design of 2-D FIR Half-Band Filters Using Genetic Algorithm
845
Design of 2D IIR digital filters with approximately flat group delay characteristic
846
Design of 2-D IIR digital filters with circular symmetry by transformation of the variable
847
Design of 2-D IIR filters using a new digital spectral transformation
848
Design of 2D IIR filters with canonical signed-digit coefficients using genetic algorithm
849
Design of 2-D linear phase IIR digital filters using 2-D impulse response gramians and implementation with low roundoff noise and no overflow oscillations
850
Design of 2-D linear phase IIR filters by using all-pass building blocks
851
Design of 2-D linear phase variable recursive digital filters for parallel form implementation
852
Design of 2-D linear-phase FIR filters with equiripple magnitude response
853
Design of 2D Linear-Phase IIR Filters Via Schur Decomposition and Discrete-Time Vector Fitting
854
Design of 2-D lowpass digital filters having variable magnitude characteristics
855
Design of 2-D MIMO antenna arrays for high resolution burden surface imaging
856
Design of 2D modular robot based on magnetic force analysis
857
Design of 2-D Mth Band Lowpass FIR Eigenfilters With Symmetries
858
Design of 2-D multiplierless filters using the genetic algorithm
859
Design of 2-D multiplierless FIR filters using genetic algorithms
860
Design of 2-D multiplierless IIR filters using the genetic algorithm
861
Design of 2-D nonrecursive filters using the window method
862
Design of 2-D nonsymmetrical band-pass filters by a combination of 2-D all-pass filters
863
Design of 2D parametric filters for directional Gaussian smoothing
864
Design of 2-D PBG structures with high refractive index contrast
865
Design of 2-D PCAS digital filters based around restrictive and highly restrictive coefficient sets
866
Design of 2-D Perfect Reconstruction Diamond-Shaped and Fan-Shaped FIR Filter Banks
867
Design of 2-D perfect reconstruction filter banks using transformations of variables: IIR case
868
Design of 2D photonic crystal waveguide based bandpass filter using electrical models of a defect
869
Design of 2-D pseudorotated digital filters with multiple outputs
870
Design of 2-D quadrantally symmetric IIR digital filter using singular value decomposition and ordered real Schur form
871
Design of 2-D quadratic filters using their bi-impulse responses
872
Design of 2-D quadrature mirror FIR filters for image subband coding
873
Design of 2-D rational digital filters
874
Design of 2-D recursive digital filters in the spatial domain
875
Design of 2-D recursive digital filters satisfying prescribed magnitude and constant group delay response
876
Design Of 2-D Recursive Digital Filters Using Nonsymmetric Half-Plane Allpass Filters
877
Design of 2-D recursive digital filters with constant group delay characteristics using separable denominator transfer function and a new stability test
878
Design of 2-D recursive digital filters with non-circular symmetric cut-off boundary and constant group-delay responses
879
Design of 2-D recursive digital filters with noncircular, symmetric cutoff boundary and constant group-delay responses
880
Design of 2-D recursive digital filters with specified magnitude and constant group-delay responses by spectral factorization
881
Design of 2-D recursive filters having approximately circularly symmetric variable magnitude characteristics
882
Design of 2-D recursive filters using computational D-modules
883
Design of 2-D recursive filters using singular value decomposition techniques
884
Design of 2-D recursive filters with asymmetric half-plane lattice modelling
885
Design of 2D recursive filters with double-directional selectivity
886
Design of 2-D recursive filters with separable denominator transfer functions
887
Design of 2-D separable in denominator filters using canonic local state-space models
888
Design of 2-D separable-denominator digital filters based on the reduced-dimensional decomposition
889
Design of 2-D separable-denominator recursive digital filters
890
Design of 2-D state-space digital filters with powers-of-two coefficients based on a genetic algorithm
891
Design of 2D TeraHertz band-gap photonic waveguides using an accelerated integral equation technique
892
Design of 2D Time-Varying Vector Fields
893
Design of 2-D Tseng window and its application to antenna array synthesis
894
Design of 2-D variable fractional delay FIR filter using 2-D differentiators
895
Design of 2-D Wideband Circularly Symmetric FIR Filters by Multiplierless High-Order Transformation
896
Design of 2-Dimension Sparse Arrays using an Improved Genetic Algorithm
897
Design of 2-dimensional circularly-symmetric digital filters
898
Design of 2-dimensional digital filters using 2-D all-pass building blocks
899
Design of 2-dimensional linear phase perfect reconstruction FIR filter bank using Lagrange multiplier method
900
Design of 2-dimensional perfect reconstruction filter banks for arbitrary sampling lattices
901
Design of 2-dimensional perfect reconstruction filter banks for arbitrary sampling lattices
902
Design of 2-dimensional recursive digital filters
903
Design of 2D-multiple notch filter and its application in reducing blocking artifact from DCT coded image
904
Design of 2-DOF PI controller for integrating processes
905
Design of 2-DOF PI controller with decoupling for coupled-tank process
906
Design of 2-DOF pyramid type ultrasonic motor
907
Design of 2Gb/s LVDS transmitter and 3Gb/s LVDS receiver for optical communication in 0.18μm CMOS technology
908
Design of 2-in-1 bandpass filter using common dual mode resonators
909
Design of 2-inertia control system by minimum-phase state control
910
Design of 2K/4K/8K-point FFT processor based on CORDIC algorithm in OFDM receiver
911
Design of 2-level hierarchical ring networks
912
Design of 2MW/10kV cascaded H-bridge power conversion system
913
Design of 2MW/10kV cascaded power conversion system
914
Design of 2-phase 4/2 SRM for torque ripple reduction
915
Design of 2-pole band pass filters using closed loop resonator and coupled lines
916
Design of 2-stage medium power amplifier using 0.5 μm GaAs PHEMT for wireless LAN applications
917
Design of 2xVDD-tolerant I/O buffer with 1xVDD CMOS devices
918
Design Of 3 GeV Booster for NSLS-II
919
Design of 3 stage low noise operational amplifier
920
Design of 3×60 Gbps DCDM based WDM system
921
Design of 3.1–5.1 GHz pulse generator for UWB communications
922
Design of 3.3 V 10 bit current-mode folding/interpolating CMOS A/D converter with an arithmetic functionality
923
Design of 3.3–3.7 GHz GaN HEMT balanced Class E power amplifier
924
Design of 3.5GHz linear high-efficiency Doherty power amplifier with pre-matching
925
Design of 3:1 multiplexer standard cell
926
Design of 30 T split-pair pulse coils for LANSCE
927
Design of 300GHz diffraction radiation oscillator with double grating
928
Design of 300W SiC wide band gap power module
929
Design of 30GHz Transition between Microstrip Line and Substrate Integrated Waveguide
930
Design of 30-MeV High-Current Linear Induction Electron Accelerator-Injector for HEP-2 Pulsed Reactor
931
Design of 3201Z-type Dump Truck´s lifting mechanism
932
Design of 325 MHz Single and Triple Spoke Resonators at FNAL
933
Design of 32-bit real numeric processor
934
Design of 32-bit RISC processor and efficient verification
935
Design of 32-bit TX2 microprocessor based on TRON specifications
936
Design of 32nm Forced Stack CNTFET SRAM cell for leakage power reduction
937
Design of 330?340 GHz 4th harmonic mixer using planar Schottky diodes
938
Design of 3-4GHz Tunable Low Noise LC-QVCO for IEEE 802.11a WLAN Application
939
Design of 35 kJ/s 25 kV capacitor charging power supply for pulsed power systems
940
Design of 36MHz CMOS Amplifier in the DTV Tuners
941
Design of 3-Bit Digital DMTL Phase Shifter for C- to Ku-Band Applications
942
Design of 3D Antennas for 24 GHz ISM Band Applications
943
Design of 3-D discrete sliding mode variable structure guidance law for air missile
944
Design of 3-D FCO filter bank using Eigenfilter based kernel for transformation of variables
945
Design of 3D FFTs with FPGA clusters
946
Design of 3-D FIR Cone-Shaped Filters by a Nest of McClellan Transformations
947
Design of 3-D FIR Cone-Shaped Filters by McClellan Transformation and Least-Squares Contour Mapping
948
Design of 3D game based on forestry science popularization
949
Design of 3-D IIR filters via transformations of 2-D circularly symmetric rotated filters
950
Design of 3D integrated inductors for RFICs
951
Design of 3-D Magnetic Field Sensor With Single Bridge of Spin-Valve Giant Magnetoresistance Films
952
Design of 3-D mesoporous silylated titanosilicate supported gold nanoparticles for direct vapor phase epoxidation of propylene: Role of solid and gaseous promoters
953
Design of 3-D Monolithic MMW Antennas Using Ceramic Stereolithography
954
Design of 3D nanomagnetic logic circuits: A full-adder case study
955
Design of 3-D noncausal filters with small roundoff noise and no overflow oscillations
956
Design of 3D optical media with periodically distributed emitting centers
957
Design of 3D Optical Network on Chip
958
Design of 3D optimal FIR filters for detecting linear trajectory signal using object shape and velocity vector
959
Design of 3-D optimal FIR filters which extract objects moving along linear trajectory
960
Design of 3-D Periodic Metamaterials for Electromagnetic Properties
961
Design of 3-D Phantoms for Human Carotid Vasculature
962
Design of 3-D planar and beam recursive digital filters using spectral transformation
963
Design of 3D Positioning Algorithm Based on RFID Receiver Array for In Vivo Micro-Robot
964
Design of 3D real-time display program architecture based on Quest3D
965
Design of 3-D recursive digital filters using linear programming
966
Design of 3D scene in the simulation system of a cutter suction dredger
967
Design of 3-D separable-denominator digital filters using minimal decomposition and balanced realization
968
Design of 3D simulation platform for cargo airdrop system
969
Design of 3D simulator for 2DOF helicopter model control
970
Design of 3D Swim Patterns for Autonomous Robotic Fish
971
Design of 3D Virtual Neuropsychological Rehabilitation Activities
972
Design of 3D Virtual Reality Reservoir Models Based on Scene Simulation of VP/OpenGL Technology
973
Design of 3-D Wavelength/Time/Space Codes for Asynchronous Fiber-Optic CDMA Systems
974
Design of 3dB wideband multisection quadrature directional coupler
975
Design of 3D-EBG for L band applications
976
Design of 3D-IC for butterfly NOC based 64 PE-multicore: Analysis and design space exploration
977
Design of 3-DOF force sensing micro-forceps for robot assisted vitreoretinal surgery
978
Design of 3-DOF parallel mechanism with thin plate for micro finger module in micro manipulation
979
Design of 3G net monitor system based on DaVinci technology
980
Design of 3G Wireless Networks with Access Concentrators
981
Design of 3KW Wind and Solar Hybrid Independent Power Supply System for 3G Base Station
982
Design of 3mm radiometric imaging system
983
Design of 3-screw tuners
984
Design of 3-stage high frequency CMOS voltage controlled oscillators
985
Design of 3-valued neural networks with cyclic connection for limit cycle generator
986
Design of 4 × 4 MIMO-OFDMA receiver with precode codebook search for 3GPP-LTE
987
Design of 4 bit flash ADC using TMCC & NOR ROM encoder in 90nm CMOS technology
988
Design of 4 bit low power carry select adder
989
Design of 4 joints 3 links biped robot and its gaits
990
Design of 4×4 aperture-coupled water patch antenna array
991
Design of 4×4 banyan optical switch using MMI switches with low crosstalk & low coupling loss
992
Design of 4×4 hard polymer clad fiber (HPCF) splitter for 2.5 Gbps short reach optical links
993
Design of 40 MVA two-pole two-speed generator for special purposes in testing laboratory
994
Design of 40–108-GHz Low-Power and High-Speed CMOS Up-/Down-Conversion Ring Mixers for Multistandard MMW Radio Applications
995
Design of 400 Hz saturistor motors with improved starting performance
996
Design of 400HZ mid-frequency static switch power employing PWM
997
Design of 400MSPS pseudo-interleaving Arbitrary Waveform Generator
998
Design of 400V class inverter drive using SiC 6-in-1 power module
999
Design of 40-GHz CRLH-TL chip antenna using 0.35-µm CMOS-MEMS technology
1000
Design of 40GHz multilayer end coupled band pass filter using LTCC technology
SiGe BiCMOS Technology
